Commit Graph

236 Commits

Author SHA1 Message Date
Sebastien Bourdeauducq 2500e71cb7 software: merge libextra into libbase 2012-05-24 19:01:47 +02:00
Sebastien Bourdeauducq 2823034a7b software/libextra: remove blockdev + fatfs 2012-05-24 18:51:27 +02:00
Sebastien Bourdeauducq f6f42293d1 Clock frequency detection 2012-05-22 13:23:44 +02:00
Sebastien Bourdeauducq 4d754dbb33 bios: serial, network and flash boot support 2012-05-21 22:57:12 +02:00
Sebastien Bourdeauducq 275ed9cd9c bios: timer support 2012-05-21 22:56:21 +02:00
Sebastien Bourdeauducq e33399de82 bios/ddrinit: use new padding scheme for address register 2012-05-21 22:55:45 +02:00
Sebastien Bourdeauducq d03ee7a89f libbase: unmask UART interrupt correctly 2012-05-21 20:01:21 +02:00
Sebastien Bourdeauducq c01594f9fd Common interrupt numbers 2012-05-21 19:52:41 +02:00
Sebastien Bourdeauducq 79124d822b Identifier 2012-05-17 01:41:41 +02:00
Sebastien Bourdeauducq bb798176fc Common include files 2012-05-16 10:20:04 +02:00
Sebastien Bourdeauducq b6aa40d845 bios: automatically enable hardware memory controller and test memory 2012-05-15 19:29:26 +02:00
Sebastien Bourdeauducq 7ecfd60368 bios: more DDR diagnostic functions 2012-05-14 20:07:57 +02:00
Sebastien Bourdeauducq 8d4a42887e ddrphy: working on hardware, simulation a bit messed up 2012-02-24 15:44:51 +01:00
Sebastien Bourdeauducq 17b2588321 ddrphy: reads OK, write data coming out 1/2 cycle too late 2012-02-24 15:05:52 +01:00
Sebastien Bourdeauducq a363eb4a36 ddrphy: partly working 2012-02-24 13:54:10 +01:00
Sebastien Bourdeauducq 92ac69bae3 dfii: new design 2012-02-23 21:21:07 +01:00
Sebastien Bourdeauducq f35cd4a85b Prepare for new DDR PHY 2012-02-19 18:43:42 +01:00
Sebastien Bourdeauducq 1e4e092a55 bios: fix function prototypes 2012-02-18 21:06:35 +01:00
Sebastien Bourdeauducq 026457a98c Send SDRAM initialization sequence and answer PHY read/write requests. Obstinately refuses to work, unfortunately. 2012-02-18 18:12:14 +01:00
Sebastien Bourdeauducq 5bc840b9c1 DFI injector (untested) 2012-02-17 23:50:10 +01:00
Sebastien Bourdeauducq c38de34a21 bios: DDR initialization skeleton 2012-02-17 18:47:04 +01:00
Sebastien Bourdeauducq e5927e265f bios: add flash target using m1nor 2012-02-17 18:16:29 +01:00
Sebastien Bourdeauducq c387ce7ce5 Map DDR PHY controls in CSR 2012-02-17 17:34:59 +01:00
Sebastien Bourdeauducq 755079d7fa libbase: blocking UART write if IRQs are enabled 2012-02-07 15:12:27 +01:00
Sebastien Bourdeauducq 73fce59631 software: shell from original BIOS 2012-02-07 15:02:44 +01:00
Sebastien Bourdeauducq ef0667d959 software: UART RX demo 2012-02-07 14:12:33 +01:00
Sebastien Bourdeauducq fb22edc06a software: enable -Wmissing-prototypes 2012-02-07 13:02:06 +01:00
Sebastien Bourdeauducq 63f6dece56 software: use the Clang/LLVM compiler 2012-02-07 12:52:34 +01:00
Sebastien Bourdeauducq a40b0ea175 software: fix size_t and ptrdiff_t 2012-02-07 12:06:49 +01:00
Sebastien Bourdeauducq 494c383fa8 software: remove unnecessary IRQ acks 2012-02-07 00:07:25 +01:00
Sebastien Bourdeauducq 4aaf48afb0 software: interrupt driven UART working 2012-02-06 23:53:29 +01:00
Sebastien Bourdeauducq 5cde57cb65 software: use new UART 2012-02-06 17:53:41 +01:00
Sebastien Bourdeauducq 45529d5941 BIOS: hello world 2012-02-05 20:01:28 +01:00
Sebastien Bourdeauducq e2317bc83b flash: remove splash screens 2012-02-05 19:12:33 +01:00
Sebastien Bourdeauducq 1ad44b6571 software: dependencies the Werner way 2012-02-03 12:25:55 +01:00
Sebastien Bourdeauducq 1a4a6eb445 Copy some software code from the original Milkymist SoC.
Libbase should keep its RAM usage to a minimum as it is meant to
be executed before the SDRAM is up and running. (Having lots of
code is OK though as we XIP from the flash)
2012-02-03 12:08:17 +01:00