Florent Kermarrec
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a1f7ecc8c5
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litesata: use 200MHz clock and SATA3 (6.0Gb/s) on all example designs: working :)
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2015-06-10 12:15:59 +02:00 |
Sebastien Bourdeauducq
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d50bb8c55e
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litesata: more doc fixes
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2015-05-26 14:13:13 +08:00 |
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Sebastien Bourdeauducq
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1e47cfce2b
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Merge branch 'master' of https://github.com/m-labs/misoc
Conflicts:
misoclib/mem/litesata/doc/source/docs/frontend/index.rst
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2015-05-26 13:57:26 +08:00 |
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Sebastien Bourdeauducq
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a9da892b57
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litesata: doc fixes
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2015-05-26 13:54:31 +08:00 |
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Florent Kermarrec
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989d8a7c29
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liteata: fix spelling & mistakes in doc
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2015-05-26 07:37:09 +02:00 |
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Florent Kermarrec
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eb922f6ddc
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litesata: rework frontend doc and add striping, mirroring
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2015-05-25 14:04:37 +02:00 |
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Florent Kermarrec
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d9111f6a04
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litesata: fix packets figure in frontend doc
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2015-05-07 11:06:05 +02:00 |
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Florent Kermarrec
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5516a49696
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litesata: add doc for frontend
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2015-05-06 03:57:07 +02:00 |
|
Florent Kermarrec
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6908ddbaf9
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litesata: cleanup README/doc
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2015-05-06 02:02:22 +02:00 |
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Florent Kermarrec
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5bd1ab7fa1
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liteXXX cores: update README and doc
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2015-02-28 21:40:59 +01:00 |
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Florent Kermarrec
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0dfca49e68
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litesata: move file and modify import to misoclib.mem.litesata
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2015-02-28 11:03:24 +01:00 |