Florent Kermarrec
af6b6c94b8
litex_setup: Use fixed sha1 for pythondata-cpu-ibex.
2021-11-16 18:16:05 +01:00
Florent Kermarrec
f6562195d5
litex_setup: Make compat_args optional, fix dev mode.
2021-10-26 15:16:43 +02:00
Florent Kermarrec
dab4845c9b
litex_setup: Handle download of PowerPC/OpenRisc GCC toolchains.
2021-10-26 15:11:28 +02:00
Florent Kermarrec
71b319eeaf
litex_setup: Switch to argparse and handle retro-compatibility.
2021-10-26 14:37:08 +02:00
Florent Kermarrec
e3b5734cb1
litex_setup: Add common gcc_toolchain_download function and use it to download the different toolchains.
2021-10-26 12:40:43 +02:00
Florent Kermarrec
d6ce5d3afa
litex_setup: Fix missing repos.
2021-10-26 12:01:21 +02:00
Florent Kermarrec
a6d076f810
litex_setup: Reorganize code with functions.
2021-10-26 11:36:38 +02:00
Florent Kermarrec
5c0e951dc3
litex_setup: Cleanup/Simplify.
2021-10-26 10:49:34 +02:00
Florent Kermarrec
9b4c7e8288
README/litex_setup: Remove reference to LiteVideo to encourage use of LiteX's VideoTerminal/Out core.
...
LiteVideo is not longer maintained, does not have CI and is messy (code is ~10 years old where we were
still experimenting the innovative approach with Migen). The core is kept since can be useful as reference
for Video Input and for projects using it but it is not recommended for new designs.
2021-10-26 08:21:00 +02:00
Florent Kermarrec
af66f8d2ec
litex_setup: Switch to pythondata-cpu-ibex.
2021-10-23 17:26:25 +02:00
Florent Kermarrec
8945d74aa3
litex_setup: Bump pythondata-misc-opentitan (and update Get SHA1 command).
2021-10-19 15:47:24 +02:00
Florent Kermarrec
d1bb62b5fb
litex_setup: Bump pythondata-cpu-microwatt to 0xdad611c.
2021-10-19 14:44:12 +02:00
Florent Kermarrec
4494e98549
litex_setup: Add link to bootlin prebuilt PowerPC/OpenRisc toolchains.
2021-10-19 14:41:42 +02:00
Florent Kermarrec
f92a185109
litex_setup: Fix git checkout to specific version (we are using short sha1 hashes).
2021-10-18 08:19:11 +02:00
Florent Kermarrec
9f0a03100d
litex_setup: Add more comment, fix checkout when sha1 starting with 0.
2021-10-07 19:03:29 +02:00
Michal Sieron
c0e7e3acd3
Revert litex_setup_url change
2021-09-28 12:35:20 +02:00
Florent Kermarrec
54623dbe26
litex_setup: Update picolibc url (now on litex-hub).
2021-09-27 18:15:10 +02:00
Florent Kermarrec
746d698b49
litex_setup.py: Revert LiteX url.
2021-09-27 16:15:16 +02:00
Michal Sieron
514754bedf
Get pythondata-software-picolibc from antmicro
2021-09-16 10:41:05 +02:00
Michal Sieron
fc0fa88e33
Update litex_setup.py to use forked codebase
2021-09-16 10:41:05 +02:00
Florent Kermarrec
78c1751c47
litex_setup: Use fixed version of opentitan for ibex CPU. (ibex has evolved since initial support).
2021-08-13 16:27:50 +02:00
Florent Kermarrec
bd1463514b
litex_setup: Remove Travis specific code (CI no longer run on Travis).
2021-06-08 10:49:28 +02:00
Florent Kermarrec
acebc949c6
litex_setup: Add USB OHCI pythondata.
2021-06-01 10:29:49 +02:00
Florent Kermarrec
82c1f5dccb
litex_setup/ibex: add pythondata-misc-opentitan to litex_setup and use it for Ibex CPU.
2021-02-17 08:07:07 +01:00
Florent Kermarrec
61034fe0f9
litex_setup/update: do a git submodule update --init --recursive on repos with recursive set to True.
...
Simplify for example pythondata-cpu-vexriscv-smp updates.
2021-01-27 07:55:59 +01:00
Florent Kermarrec
b9e0c95c18
cpu/microwatt: use 0xf9807b6 and fix compilation, working with IRQs :)
...
Tested with:
/arty.py --cpu-type=microwatt --cpu-variant=standard+irq --integrated-rom-size=0x10000 --build --load
__ _ __ _ __
/ / (_) /____ | |/_/
/ /__/ / __/ -_)> <
/____/_/\__/\__/_/|_|
Build your hardware, easily!
(c) Copyright 2012-2020 Enjoy-Digital
(c) Copyright 2007-2015 M-Labs
BIOS built on Dec 30 2020 15:59:16
BIOS CRC passed (fb76e85d)
Migen git sha1: d42aa6f
LiteX git sha1: 74844db3
--=============== SoC ==================--
CPU: Microwatt @ 100MHz
BUS: WISHBONE 32-bit @ 4GiB
CSR: 32-bit data
ROM: 64KiB
SRAM: 8KiB
L2: 8KiB
SDRAM: 262144KiB 16-bit @ 800MT/s (CL-6 CWL-5)
--========== Initialization ============--
Initializing SDRAM @0x40000000...
Switching SDRAM to software control.
Write latency calibration:
m0:0 m1:0
Read leveling:
m0, b0: |00000000000000000000000000000000| delays: -
m0, b1: |00000000000011111111111111100000| delays: 19+-07
m0, b2: |00000000000000000000000000001111| delays: 30+-02
m0, b3: |00000000000000000000000000000000| delays: -
m0, b4: |00000000000000000000000000000000| delays: -
m0, b5: |00000000000000000000000000000000| delays: -
m0, b6: |00000000000000000000000000000000| delays: -
m0, b7: |00000000000000000000000000000000| delays: -
best: m0, b01 delays: 19+-07
m1, b0: |00000000000000000000000000000000| delays: -
m1, b1: |00000000000011111111111111000000| delays: 19+-07
m1, b2: |00000000000000000000000000001111| delays: 30+-01
m1, b3: |00000000000000000000000000000000| delays: -
m1, b4: |00000000000000000000000000000000| delays: -
m1, b5: |00000000000000000000000000000000| delays: -
m1, b6: |00000000000000000000000000000000| delays: -
m1, b7: |00000000000000000000000000000000| delays: -
best: m1, b01 delays: 19+-06
Switching SDRAM to hardware control.
Memtest at 0x0000000040000000 (2MiB)...
Write: 0x40000000-0x40200000 2MiB
Read: 0x40000000-0x40200000 2MiB
Memtest OK
Memspeed at 0x0000000040000000 (2MiB)...
Write speed: 32MiB/s
Read speed: 54MiB/s
--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
sL5DdSMmkekro
Timeout
No boot medium found
--============= Console ================--
litex>
2020-12-30 16:20:20 +01:00
Florent Kermarrec
c169494793
litex_setup: detect and allow execution from a cloned LiteX repository.
...
Others dependencies will be installed alongside the Litex repository.
2020-09-10 13:19:34 +02:00
Florent Kermarrec
59b95fad9c
litex_setup: fix vexriscv-smp repository.
2020-07-28 16:56:32 +02:00
Dolu1990
aa57c7a25e
soc/cores/cpu/vexriscv_smp integration
2020-07-28 16:20:16 +02:00
Florent Kermarrec
a01d08e5b5
litex_setup.py: update microwatt.
2020-06-10 15:03:23 +02:00
Florent Kermarrec
b23702ecc4
litex_setup/pythondata-cpu-cv32e40p: clone in recursive mode.
2020-05-22 15:43:00 +02:00
enjoy-digital
4c4cd335de
Merge pull request #535 from antmicro/arty-cv32e40p
...
Add support for the CV32E40P RISC-V CPU
2020-05-22 13:44:10 +02:00
Piotr Binkowski
2903b1bf80
litex_setup: add pythondata for cv32e40p
2020-05-20 13:46:37 +02:00
Florent Kermarrec
d71152ef66
litex_setup: move requests import to avoid having to install it on travis.
2020-05-20 11:30:50 +02:00
Florent Kermarrec
d389005550
litex_setup: add automatic update of litex_setup (because it also changes) and be sure we are on master branch before update.
2020-05-20 09:10:53 +02:00
Florent Kermarrec
6f8f0d2346
litex_setup: add litehyperbus and remove hyperbus core/test.
2020-05-19 15:49:25 +02:00
Florent Kermarrec
55c0ddab36
litex_setup: add sha1 support on git clone/pull and fix microwatt to a specific sha1.
...
The pythondata are generated automatically from external sources, some of them are
stable, some others still under development, so allow specifying a specific sha1
commit for sources that are moving and breaking LiteX support.
2020-05-19 13:27:12 +02:00
sadullah
5e4a436089
Vivado Command Update for Systemverilog
...
Add BlackParrot to LiteX setup file
2020-05-12 03:05:41 -04:00
Florent Kermarrec
c06a127909
cpu/microwatt: add pythondata and fix build with it.
2020-05-04 08:46:25 +02:00
Florent Kermarrec
bd8a410047
cpu/minerva: add pythondata and use it to compile the sources.
2020-05-01 20:12:02 +02:00
Florent Kermarrec
e4a4659d4d
litex_setup: add nmigen dependency (used to generate Minerva CPU).
...
This also requires Yosys, but Yosys is already expected to be installed separately.
2020-05-01 19:10:13 +02:00
Florent Kermarrec
6d0896de1d
cpu/serv: switch to pythondata package instead of local git clone.
2020-04-28 10:34:39 +02:00
Florent Kermarrec
ff61b1f6fa
litex_setup: disable automatic clone of BlackParrot/Microwatt CPUs, reorder LiteX data.
...
The support is not fully finished, so let the user install the pythondata for these CPUs manually with pip.
2020-04-28 09:01:06 +02:00
enjoy-digital
317ea7edd1
Merge branch 'master' into litex-sm2py
2020-04-27 22:24:10 +02:00
Florent Kermarrec
a8bf02167a
litex_setup: raise exception on update if repository has been been initialized.
2020-04-12 19:46:56 +02:00
Tim 'mithro' Ansell
ebcb2a4406
Rename litex-data-XXX-YYY to pythondata-XXX-YYY
2020-04-11 18:37:06 -07:00
Tim 'mithro' Ansell
a39a4ec2ed
Only allow fast-forward pulls.
2020-04-11 18:37:06 -07:00
Tim 'mithro' Ansell
119985f353
Use the current directory you are running.
2020-04-11 18:37:06 -07:00
Tim 'mithro' Ansell
3ae4f8f2de
Adding missing vexriscv CPU.
2020-04-11 18:37:06 -07:00
Tim 'mithro' Ansell
ac3fd794f9
Adding missing comma.
2020-04-11 18:37:06 -07:00