Commit Graph

9870 Commits

Author SHA1 Message Date
Alexey Morozov 903c5fb9a1 handle the case when AWVALID and WVALID are not asserted at the same clock cycle 2024-05-07 13:33:04 +02:00
Dolu1990 588b7a9519 Update Vexii 2024-05-06 19:48:56 +02:00
Florent Kermarrec 86a43c9ff7 integration/export: Fix get_csr_header/base_define when with_csr_base_define is set to False. 2024-05-06 14:59:17 +02:00
Liam Murphy e07c4fdb2a
Add missing 32-bit variants of RISC-V target triples
I had to waste another 10-15 minutes building a `riscv64-none-elf` GCC
instead after LiteX didn't like my `riscv32-none-elf` one, so I thought
I'd quickly add it. (I was using that target triple because it's what
Nix's `pkgsCross.riscv32-embedded` package set uses).

I also added 32-bit variants of the rest of the target triples which
didn't have them.
2024-05-04 17:41:32 +10:00
Dmitry Derevyanko 26f5e8a149 Revert LitexModule for AXILiteSRAM as well. Follows revert d021564fca for wishbobe. 2024-05-03 00:51:01 +03:00
Nicolas Gaudin bd0adb5be7
Support isr for cv32e41p core 2024-04-30 14:07:07 +02:00
enjoy-digital 76a704377f
Merge pull request #1941 from motec-research/vexriscv_debug_halted
cpu/vexriscv: expose o_halted
2024-04-26 13:43:40 +02:00
Dolu1990 7aae2bf897
Merge pull request #1940 from enjoy-digital/Dolu1990-patch-1
cpu/naxriscv update mBus to preserve memory accesses offset
2024-04-26 11:21:18 +02:00
Florent Kermarrec fd477703db soc/integration/export: Revert #1938 (needs to be reviewed/discussed). 2024-04-26 10:59:02 +02:00
AndrewD bd4ca4371d
Merge pull request #1938 from motec-research/guard_access_function
soc/export: add guard for access_functions
2024-04-26 12:06:49 +10:00
Andrew Dennison 3a008b4988 cpu/vexriscv: expose o_halted 2024-04-26 11:17:41 +10:00
Dolu1990 ea33e37b1a
cpu/naxriscv update mBus to preserve memory accesses offset
See #1922
2024-04-25 16:06:34 +02:00
Dolu1990 8831acba65 naxriscv fix simulation reset 2024-04-25 16:01:49 +02:00
enjoy-digital b6bfe42b6b
Merge pull request #1937 from motec-research/litex_term_deprecation_warning
tools/litex_term: fix DeprecationWarning
2024-04-25 11:38:09 +02:00
enjoy-digital ac1166946c
Merge pull request #1936 from motec-research/fix_recursive_exception
get_data_mod(): fix recursive exception reporting
2024-04-25 11:37:41 +02:00
Gwenhael Goavec-Merou 546f4d93ff
Merge pull request #1939 from hansfbaier/master
yosys+nextpnr: fix error message
2024-04-25 07:03:44 +02:00
Hans Baier d73190ac29 yosys+nextpnr: fix error message 2024-04-25 06:23:22 +07:00
Andrew Dennison 7481b1e161 soc/export: add guard for access_functions
Disable access functions with -DLITEX_ACCESS_FUNCTIONS=0 when compiling.
Useful when using litex generated headers in an environment where
the access functions generate warnings and are not used.
2024-04-22 12:16:48 +10:00
Andrew Dennison 19db78da15 get_data_mod(): fix recursive exception reporting 2024-04-22 12:09:45 +10:00
Andrew Dennison 60d9a635ce tools/litex_term: fix DeprecationWarning
litex/litex/tools/litex_term.py:557: DeprecationWarning: setDaemon() is deprecated, set the daemon attribute instead
  self.reader_thread.setDaemon(True)
litex/litex/tools/litex_term.py:586: DeprecationWarning: setDaemon() is deprecated, set the daemon attribute instead
  self.writer_thread.setDaemon(True)
2024-04-22 11:43:17 +10:00
Florent Kermarrec d324c0e150 test/test_cpu: Disable Microwatt that seems to be broken. 2024-04-20 08:51:10 +02:00
enjoy-digital e4dc68206d
Merge pull request #1932 from trabucayre/fix_openxc7
build/xilinx/yosys_nextpnr.py: fix device name for xc7a35ticsg324-1L & xc7a200t-sbg484-1 (as done for f4pga)
2024-04-19 13:43:31 +02:00
Gwenhael Goavec-Merou 7f7e44646d build/xilinx/yosys_nextpnr.py: fix device name for xc7a35ticsg324-1L & xc7a200t-sbg484-1 (as done for f4pga) 2024-04-19 06:57:01 +02:00
Florent Kermarrec d6eeb20505 tools/litex_term: Minor cosmetic changes. 2024-04-18 15:09:24 +02:00
Gwenhael Goavec-Merou 22f4637570 Revert "Uart tx irq handling fix " (issue #554)
This reverts commit 6885770e47.
2024-04-16 14:01:38 +02:00
Florent Kermarrec 3978af9c39 test/test_hyperbus: Update. 2024-04-16 11:12:30 +02:00
Florent Kermarrec a44b7944ca CHANGES: Update. 2024-04-16 10:51:19 +02:00
Florent Kermarrec fd6f913525 cores/hyperbus: Switch default latency_mode to variable. 2024-04-16 10:20:18 +02:00
Florent Kermarrec 62b9c64212 cores/hyperbus: Add status register to report configured latency_mode to software and allow corresponding configuration. 2024-04-16 10:18:53 +02:00
enjoy-digital 576ab24b6c
Merge pull request #1926 from enjoy-digital/hyperbus_variable_latency
HyperRAM: Add variable latency and configuration support.
2024-04-15 17:39:04 +02:00
enjoy-digital e3d1391487
Merge pull request #1925 from chmousset/fix_efinix_t8q144
[fix] T8Q144 PLL input instance reference
2024-04-15 17:38:37 +02:00
Florent Kermarrec ebabe82c70 software/bios/main: Rewrite HyperRAM init/config. 2024-04-15 16:03:55 +02:00
Florent Kermarrec 67586e8a24 cores/hyperbus: Update docstring. 2024-04-15 15:05:58 +02:00
Florent Kermarrec d25fd85f55 cores/hyperbus: More cleanups. 2024-04-15 14:56:08 +02:00
Florent Kermarrec 2100a6bd8c cores/hyperbus: reg_buf.source -> reg_ep. 2024-04-15 14:48:38 +02:00
Florent Kermarrec 1597791fb6 cores/hyperbus: Simplify reg_write/read_done. 2024-04-15 14:43:15 +02:00
Florent Kermarrec 8e48d0d330 cores/hyperbus: Cleanup/Improve Config/Reg Interfaces. 2024-04-15 14:33:41 +02:00
Florent Kermarrec 6e00cfa9d0 cores/hyperbus: Cleanup fixed/variable latency support. 2024-04-15 14:05:39 +02:00
Charles-Henri Mousset 739b66a15b
[fix] Trion T8 have a V1 PLL in BGA packages, but a V2 PLL in TQFP package. DP files varies accordingly 2024-04-15 12:09:18 +02:00
Florent Kermarrec 93f76ede95 bios/main: Test down to latency = 3, working. 2024-04-15 12:06:49 +02:00
Florent Kermarrec a95f1b8486 cores/hyperbus: Make latency dynamically configurable. 2024-04-15 12:06:11 +02:00
Florent Kermarrec 6216bd4e99 cores/hyperbus: Add latency_mode parameter and test different latencies/modes in simulation. 2024-04-15 10:32:13 +02:00
Florent Kermarrec 33a1fcda48 software/bios: Do minimal reconfiguration for variable latency and start testing latency cycles re-configuration. 2024-04-12 19:35:31 +02:00
Florent Kermarrec f8c59c03e3 cores/hyperbus: Add variable latency support (working on ti60 f225). 2024-04-12 18:50:19 +02:00
Florent Kermarrec b192103822 cores/hyperbus: Fix bytes order on register writes. 2024-04-12 16:06:26 +02:00
Florent Kermarrec fb519ac260 test/test_hyperbus: Add test_hyperram_reg_write. 2024-04-12 15:21:57 +02:00
Florent Kermarrec a32db7abad cores/hyperbus: Add with_csr parameter to make Register interface optional. 2024-04-12 15:21:32 +02:00
enjoy-digital 2d1dd45fd2
Merge pull request #1919 from nrndda/uart_tx_irq_handling_fix
Uart tx irq handling fix
2024-04-12 10:45:12 +02:00
enjoy-digital 2bc41928a3
Merge pull request #1916 from motec-research/spi_mmap
SPIMMAP bug fixes and new features
2024-04-12 10:38:05 +02:00
enjoy-digital a891b2dd11
Merge pull request #1904 from machdyne/master
litex_json2dts_linux: Add support for multiple Ethernet interfaces
2024-04-12 10:32:12 +02:00