Commit Graph

74 Commits

Author SHA1 Message Date
Florent Kermarrec 145398d874 liteeth/core/mac: minor cleanup 2015-05-02 16:48:57 +02:00
Florent Kermarrec 63b8797978 liteeth: move mac to core 2015-05-02 16:22:35 +02:00
Florent Kermarrec a4617014f4 cores: avoid having too much directories when possible (for simple cores or cores contained in a single file) 2015-05-02 16:22:33 +02:00
Florent Kermarrec 3ebe877fd2 use similar names for wishbone bridges and move wishbone drivers to [core]/software 2015-05-02 16:22:30 +02:00
Florent Kermarrec c03c41eb77 litescope: rename host directory to software (to be coherent with others cores) 2015-05-01 20:45:02 +02:00
Florent Kermarrec 1281a463d6 litescope/bridge: create a generic wishbone bridge that can be used with different phys (the phy needs to provide a sink/source with 8bits data).
- we can now pass a phy to LiteScopeWishboneBridge
- LiteScopeUART2Wishbone is only a specific LiteScopeWishboneBridge
- UART mux is removed since complicated and no longer useful (we can now create easily virtual UART over Ethernet, USB or PCIe) or simply add another UART for debug.
2015-05-01 17:51:18 +02:00
Florent Kermarrec d253adee61 liteeth: use Migen's Packetizer/Depacketizer, remove generic and move etherbone/tty to frontend 2015-04-28 18:51:40 +02:00
Florent Kermarrec 91c77d464c liteeth: use new Migen modules from actorlib (avoid duplications between cores) 2015-04-27 15:06:37 +02:00
Florent Kermarrec 0b1a2e1022 liteeth: do MII/GMII detection in gateware for gmii_mii phy 2015-04-26 18:08:07 +02:00
Florent Kermarrec 07b7c2a13f liteeth/phy/gmii: add default value for pads_register 2015-04-26 14:54:54 +02:00
Florent Kermarrec ae71bf2830 liteeth: fix and improve 10/100/1000Mbps speed auto detection 2015-04-26 14:54:53 +02:00
Florent Kermarrec 130fd19dec liteeth/core/ip: simplify ip rx checksum control 2015-04-24 11:31:10 +02:00
Florent Kermarrec 5b48e7bb52 liteeth: finish with_preamble_crc vs with_hw_preamble_crc renaming 2015-04-24 11:30:35 +02:00
Florent Kermarrec 2d56d32009 liteeth/mac/core: simplify and fix padding 2015-04-24 09:36:33 +02:00
Florent Kermarrec 5a930fe7cf lite* cores: changes permissions (+x) on make.py files and on litepcie init.sh file 2015-04-18 08:51:59 -04:00
Florent Kermarrec 2bd38f44a3 liteeth: more pep8 (when convenient), should be almost OK 2015-04-13 13:02:04 +02:00
Florent Kermarrec 154d3d3b04 liteeth: pep8 (E265) 2015-04-13 11:27:01 +02:00
Florent Kermarrec 45dc4920ec liteeth: pep8 (E261, E271) 2015-04-13 11:07:50 +02:00
Florent Kermarrec 021a5ae8a0 liteeth: pep8 (W292) 2015-04-13 10:58:45 +02:00
Florent Kermarrec a84f12618b liteeth: pep8 (E225) 2015-04-13 10:56:18 +02:00
Florent Kermarrec 66ce40d880 liteeth: pep8 (E222) 2015-04-13 10:48:59 +02:00
Florent Kermarrec ff2d7f9adc liteeth: pep8 (E401) 2015-04-13 10:45:09 +02:00
Florent Kermarrec 726fd3ab42 liteeth: pep8 (E203) 2015-04-13 10:39:46 +02:00
Florent Kermarrec 8dc817dd70 liteeth: pep8 (E231) 2015-04-13 10:31:18 +02:00
Florent Kermarrec 9c527742cb liteeth: pep8 (E201) 2015-04-13 10:23:33 +02:00
Florent Kermarrec 5720638d85 liteeth: pep8 (E302) 2015-04-13 10:20:02 +02:00
Florent Kermarrec cd43eaffc2 liteeth: pep8 (replace tabs with spaces) 2015-04-13 09:53:43 +02:00
Florent Kermarrec afa9b889ae liteeth/phy/gmii: fix clock generation for mii mode (clock_pads.tx is an input) 2015-04-12 22:15:45 +02:00
Florent Kermarrec 8e639160e3 liteeth/phy/gmii_mii: add pads registers in RX 2015-04-12 20:43:01 +02:00
Florent Kermarrec 0c27708b0a liteeth/phy/gmii_mii: avoid doubling pads register on TX 2015-04-12 20:42:12 +02:00
Florent Kermarrec bc81d9d639 liteeth/phy/__init__.py: add more comments 2015-04-12 18:56:46 +02:00
Florent Kermarrec 515398634f liteeth/phy/gmii_mii: add clock counter and use it in bios to select mode 2015-04-12 18:42:52 +02:00
Florent Kermarrec 857bee8a00 liteeth/phy: add GMII/MII phy
for now swicth is manual, we will need a clk counter to allow software or logic to automatically switch between GMII and MII
2015-04-12 17:25:55 +02:00
Florent Kermarrec cfac3d9f5c liteeth/phy/mii: simplify LiteEthPHYMIIRX using Converter 2015-04-12 16:03:21 +02:00
Florent Kermarrec ddae41f2e4 liteeth/phy/mii: simplify LiteEthPHYMIITX using Converter 2015-04-12 15:34:56 +02:00
Florent Kermarrec 8c722db54e liteeth/phy/mii: assign tx_er only if exists (as it's done on GMII) 2015-04-12 14:43:35 +02:00
Florent Kermarrec 4329e3e1b9 liteeth/phy/mii: allow use of MII phy on GMII/MII chips that do not have phy clock provided by the FPGA (tested on KC705) 2015-04-12 14:28:17 +02:00
Sebastien Bourdeauducq 603a4ef51e liteeth: adapt to new ModuleTransformer 2015-04-10 11:42:25 +08:00
Florent Kermarrec 03aa972bb6 lite*: finish ModuleTransformer adaptations (need to be tested on board) 2015-04-08 23:27:22 +02:00
Robert Jordens 66f8dcbfaf lite*: adapt to new ModuleTransformer semantics
NOTE: There is loads of duplicated code between the lite*
modules that should be shared.
2015-04-04 19:17:24 +08:00
Florent Kermarrec dcdf5df4de adapt LiteEth to new SoC 2015-04-01 22:50:29 +02:00
Florent Kermarrec 9107710f03 litexxx cores: use default baudrate of 115200 for all tests 2015-03-20 12:22:53 +01:00
Florent Kermarrec 84b631c929 liteeth/mac/core: add with_padding option (enabled by default) and change with_hw_preamble_crc option to with_preamble_crc 2015-03-19 14:52:02 +01:00
Florent Kermarrec 6bdf60567c liteeth/mac/core: fix hw_preamble_crc register generation 2015-03-19 13:03:27 +01:00
Florent Kermarrec 236ea0f572 liteeth: use bios ip_address in example designs 2015-03-18 18:18:43 +01:00
Florent Kermarrec a266deb58e LiteXXX cores: fix frequency print in test/test_regs.py 2015-03-17 16:01:25 +01:00
Florent Kermarrec d2cb41bc63 LiteXXX cores: convert port parameter to int if is digit in test/make.py 2015-03-17 15:58:21 +01:00
Florent Kermarrec 2327710387 liteeth/phy/gmii : set tx_er to 0 only if it exits 2015-03-17 12:24:06 +01:00
Florent Kermarrec 408d0fd2dd liteeth: use default programmer in make.py 2015-03-17 12:12:21 +01:00
Florent Kermarrec ec6ae75065 liteeth: use CRG from Migen in base example 2015-03-17 12:11:51 +01:00