Commit Graph

87 Commits

Author SHA1 Message Date
whitequark eb643f1132 Export _cache_init from crt0.S. 2015-07-31 02:40:52 +03:00
whitequark 66839b512a Update libunwind submodule. 2015-07-31 02:38:38 +03:00
Florent Kermarrec 405efc5560 update lm32 with "Switch to -fPIC" changes. 2015-07-28 11:11:11 +02:00
whitequark 50cf70140b Update libbase/linker-sdram.ld with -fPIC support. 2015-07-26 16:15:02 +03:00
whitequark c8ffd0c9ee Switch to -fPIC.
Using -fPIC for everything allows to link the MiSoC static libraries
both into static images such as the BIOS as well as
into shared libraries.
2015-07-26 16:06:48 +03:00
whitequark 24463a168a Add a stub getenv() implementation.
This is not strictly necessary to build libunwind (it can
be built with -DNDEBUG), but it will be handy while it is
debugged.

It can be removed afterwards.
2015-07-26 12:55:52 +03:00
whitequark 10f719a830 Add support for fprintf(stderr, ...). 2015-07-26 12:42:53 +03:00
whitequark 0f47876d2e common.mak: remove RANLIB.
`ranlib` is not necessary on any system we can possibly build for,
as it is superseded by `ar s` for the last ten years or so (at least).
Thus, change ar invocations to `ar crs`, also removing a `l` flag
that is ignored by binutils.
2015-07-26 03:20:23 +03:00
Sebastien Bourdeauducq 84514cf8d5 uart: remove option to refill HW from uart_write 2015-07-19 23:41:38 +02:00
Robert Jordens 097248bce9 uart.c: rx overflow fix and tx simplification
* fixes the clearing of the rx ringbuffer on rx-overflow
* removes tx_level and tx_cts by restricting the ringbuffer
  to at least one slot empty
* agnostic of the details of the tx irq: works for uarts that
  generate tx interrupts on !tx-full or on tx-empty.
* only rx_produce and tx_consume need to be volatile
2015-07-19 23:37:00 +02:00
Florent Kermarrec 781869d6f9 software/libbase/system: fix flush_l2_cache 2015-06-19 09:00:14 +02:00
Florent Kermarrec f44956bfca soc/sdram: add L2_SIZE constant and avoid declaring an empty flush_l2_cache function when L2_SIZE is not defined 2015-06-19 08:39:37 +02:00
Florent Kermarrec 3b9f287bab sdram: use wishbone cache as L2 cache and add optional L2 cache to Minicon 2015-06-17 15:30:30 +02:00
Yann Sionneau a8b9c126cd spiflash: now using 64k sectors 2015-05-27 18:44:14 +08:00
Yann Sionneau 3f7e161867 spiflash: cleanup unnecessary parenthesis 2015-05-27 18:44:14 +08:00
Florent Kermarrec 8aa3fb3eb7 com/uart: add tx and rx fifos.
Since ressource usage is low with default depth of 16 (implemented in RAM LUTs) we don't keep old behaviour.
Tested successfully with BIOS and flterm.
2015-05-01 15:59:26 +02:00
Sebastien Bourdeauducq 1d9771f574 spiflash: use SoC defines, add write_to_flash function 2015-04-27 13:42:32 +08:00
Sebastien Bourdeauducq 73d3b8487c crt0-or1k: clean up indentation 2015-04-03 13:23:28 +08:00
Sebastien Bourdeauducq 63f14f3f30 libbase: implement flush_l2_cache for or1k 2015-04-02 16:47:03 +08:00
Florent Kermarrec 6492ef1efa linker-sdram.ld: sdram mem region is now called main_ram 2015-03-25 16:45:19 +01:00
Florent Kermarrec 9bc71f374a rename sdram mapping to main_ram 2015-03-21 21:01:46 +01:00
Florent Kermarrec 473997df26 cpuif: add CSR_ prefix to CSR base addresses (avoid conflicts between CSR and mems bases) 2015-03-02 16:52:17 +01:00
Florent Kermarrec 07b9cabd0d gensoc: make it more generic (a SoC does not necessarily have a CPU) 2015-02-27 16:39:00 +01:00
Florent Kermarrec be0eb8d265 use cachesize reported in wishbone2lasmi 2015-02-27 14:13:38 +01:00
Yann Sionneau edb1622668 spiflash: BB write support 2014-11-27 23:10:39 +08:00
Sebastien Bourdeauducq 14d53526be libbase: use __builtin_setjmp and __builtin_longjmp 2014-09-21 17:43:17 +08:00
Sebastien Bourdeauducq 8349543732 style 2014-07-05 18:56:20 +02:00
Sebastien Bourdeauducq 2bb821c571 crt-or1k: trim useless exception vectors 2014-07-05 18:53:23 +02:00
Sebastien Bourdeauducq 4c2a2090b1 libbase: remove crt during make clean 2014-06-01 23:17:43 +02:00
Sebastien Bourdeauducq b26ac465bd crt0: remove macadress for or1k as well 2014-05-24 10:43:50 +02:00
Robert Jordens 6deeca064f bios/crt0.S: remove unused macaddr, add syscall handler stub 2014-05-24 10:41:54 +02:00
Sebastien Bourdeauducq 13e74b8b4f software: factorize exception_handler 2014-05-14 15:01:38 +02:00
Sebastien Bourdeauducq 1c08aeb21c Initial mor1kx (OpenRISC) support
Based on milkymist-ng-mor1kx by Stefan Kristiansson
2014-05-14 10:24:56 +02:00
Sebastien Bourdeauducq 9e784fc82c Generate mem.h from SoC description 2014-02-21 17:55:05 +01:00
Sebastien Bourdeauducq fca0b968e7 generate linker memory map, move all generated files into the same folder 2013-11-24 19:50:17 +01:00
Sebastien Bourdeauducq c3d0985fb2 add L2 cache size in identifier + function to flush L2 2013-11-16 16:27:21 +01:00
Sebastien Bourdeauducq 1582bad2d6 videomixer: filter PLL lock output 2013-11-13 16:50:09 +01:00
Sebastien Bourdeauducq d7a4d8b66e use git commit id as version 2013-11-09 16:38:44 +01:00
Sebastien Bourdeauducq 0b881d934f rename milkymist-ng to MiSoC 2013-11-09 15:27:32 +01:00
Florent Kermarrec e7c72a826c uart_isr: fix interrupts clear 2013-10-23 13:04:49 +02:00
Sebastien Bourdeauducq e42a42ce40 software: move time.c to libbase 2013-07-11 19:00:48 +02:00
Sebastien Bourdeauducq c2ec077d8f software: share SDRAM linker script 2013-07-11 18:49:42 +02:00
Sebastien Bourdeauducq 25506c1ab5 software: share crt0 2013-07-11 18:36:26 +02:00
Sebastien Bourdeauducq 3eb41f73e6 Simplify system ID 2013-05-19 19:44:00 +02:00
Sebastien Bourdeauducq d487dc607f software: add nofloat libbase for size-optimized binaries 2013-05-19 12:41:40 +02:00
Sebastien Bourdeauducq 581cf5bcb8 timer: atomic reads 2013-05-13 17:18:30 +02:00
Yann Sionneau 301008cd0c Some Makefile love 2013-05-12 14:24:18 +02:00
Sebastien Bourdeauducq fdf7f10f54 Automatically build CSR access functions 2013-03-25 14:42:48 +01:00
Sebastien Bourdeauducq a9b723568a Use new module, autoreg and eventmanager Migen APIs 2013-03-10 19:32:38 +01:00
Sebastien Bourdeauducq 080dbaa206 software: hide and delete .ts files 2013-01-10 18:01:42 +01:00