Sebastien Bourdeauducq
|
6c9810532b
|
genlib/fifo/SyncFIFOBuffered: replace not supported
|
2014-09-17 19:59:13 +08:00 |
Sebastien Bourdeauducq
|
4cacf97088
|
genlib/fifo: same 'level' semantics between SyncFIFOBuffered and FWFT SyncFIFO
|
2014-09-17 19:58:43 +08:00 |
Sebastien Bourdeauducq
|
503a2f00b5
|
mor1kx: sync
|
2014-09-12 16:00:32 +08:00 |
Florent Kermarrec
|
09ebcc47aa
|
setup.py: fix README filename
|
2014-09-12 08:19:05 +08:00 |
Sebastien Bourdeauducq
|
264bc61e04
|
genlib/fifo: add replace command to sync FIFO
|
2014-09-10 21:19:15 +08:00 |
Sebastien Bourdeauducq
|
b15c357a10
|
README: more markdown fixes
|
2014-09-10 20:52:19 +08:00 |
Sebastien Bourdeauducq
|
4bdc550924
|
README: markdown fixes
|
2014-09-10 20:51:17 +08:00 |
Sebastien Bourdeauducq
|
92e51f10b1
|
README: use markdown
|
2014-09-10 20:49:49 +08:00 |
Sebastien Bourdeauducq
|
325ffdc6c6
|
actorlib/spi: remove unneeded import
|
2014-09-08 18:48:54 +08:00 |
Florent Kermarrec
|
c1e12c3346
|
actorlib/spi: remove EventManager from DMAController
|
2014-09-08 11:34:21 +08:00 |
Robert Jordens
|
0bac463780
|
sim/icarus: add vpi directory to module search path
This allows running the iverilog simulations from the migen top directory
without having to install the .vpi anywhere.
|
2014-09-07 16:49:12 +08:00 |
Robert Jordens
|
3d84a7a9de
|
cordic: round() constants if not power of two bitwidth, cleanup, simplify some logic
|
2014-09-07 16:49:12 +08:00 |
Robert Jordens
|
11f58862db
|
test_cordic: stop spewing out numbers
|
2014-09-07 16:49:12 +08:00 |
Robert Jordens
|
11fedfc825
|
doc: update for NetworkX refactoring
|
2014-09-07 16:48:46 +08:00 |
Robert Jordens
|
7518a7b0c0
|
examples/dataflow: adapt to new simple MultiDiGraph implementation
|
2014-09-07 16:48:46 +08:00 |
Robert Jordens
|
4def6ec391
|
flow/network: replace NetworkX MultiDiGraph with simple implementation
|
2014-09-07 16:48:46 +08:00 |
Robert Jordens
|
8489604142
|
examples/dataflow/dma: fix simulation, run it for 100 cycles
|
2014-09-07 16:48:46 +08:00 |
Robert Jordens
|
683643266f
|
cordic: vivado is bad at inferring compact adder/subtractor logic
|
2014-09-04 15:25:34 +08:00 |
Robert Jordens
|
4328122a9c
|
vivado: add more reporting
|
2014-09-04 15:25:34 +08:00 |
Robert Jordens
|
7c19e43444
|
vivado: mode batch to prevent vivado from opening tcl shell on error
|
2014-09-04 15:25:34 +08:00 |
Florent Kermarrec
|
c0c17030fd
|
spi_flash: simplify usage by removing cmd, cmd_width, addr_width parameters
|
2014-09-04 15:23:39 +08:00 |
Sebastien Bourdeauducq
|
f21e05025d
|
platforms/kc705: use jtaghs1_fast cable
|
2014-09-03 17:29:26 +08:00 |
Sebastien Bourdeauducq
|
36434b62f0
|
sdram: merge DFII_PIX_RDDATA_SIZE and DFII_PIX_WRDATA_SIZE
|
2014-09-03 15:02:38 +08:00 |
Sebastien Bourdeauducq
|
2388bfabc3
|
bios: support DDR3 write leveling and read calibration. This makes the full DDR3 SODIMM work on the KC705.
|
2014-09-03 14:25:26 +08:00 |
Sebastien Bourdeauducq
|
a7b4550e59
|
sdramphy/initsequence: cleanup and expose DDR3 MR1 value
|
2014-09-03 14:21:30 +08:00 |
Florent Kermarrec
|
644fa8ec55
|
kc705: enable DCI termination on DDR3
|
2014-09-02 10:54:38 +08:00 |
Florent Kermarrec
|
114890ee80
|
sdramphy/initsequence: clean up mr1/mr2 computation on DDR3 and enable Dynamic ODT
|
2014-09-02 10:54:29 +08:00 |
Sebastien Bourdeauducq
|
2234f50223
|
k7ddrphy: add bitslip control for incoming DQ
|
2014-09-01 19:54:39 +08:00 |
Sebastien Bourdeauducq
|
0eeb0ad9eb
|
targets/kc705: add ddrphy to CSR map
|
2014-09-01 16:40:10 +08:00 |
Sebastien Bourdeauducq
|
6decb357f1
|
bios: add sdrrderr
|
2014-09-01 15:23:37 +08:00 |
Sebastien Bourdeauducq
|
57335bdf3f
|
bios: add DQ filtering to sdrrd, add sdrrdbuf command
|
2014-09-01 14:58:58 +08:00 |
Sebastien Bourdeauducq
|
5483b37c8f
|
k7ddrphy: write leveling and read calibration support
|
2014-08-31 21:54:28 +08:00 |
Sebastien Bourdeauducq
|
19abe2b888
|
k7ddrphy: do not register T at SERDES (fixes timing problem)
|
2014-08-31 21:53:35 +08:00 |
Sebastien Bourdeauducq
|
a2096ff083
|
libcompiler-rt: add moddi3
|
2014-08-28 16:54:12 +08:00 |
Sebastien Bourdeauducq
|
541e5abbc7
|
k7ddrphy: update comment
|
2014-08-22 19:02:57 +08:00 |
Sebastien Bourdeauducq
|
66fe45ba96
|
k7ddrphy: decrease CAS latency to account for cmd/data flight time
|
2014-08-22 18:46:01 +08:00 |
Sebastien Bourdeauducq
|
b94647ab16
|
k7ddrphy: suppress idiotic bitgen warning about ISERDES IOBDELAY parameter
|
2014-08-22 18:45:25 +08:00 |
Sebastien Bourdeauducq
|
402c7db63c
|
platforms/kc705: read the configuration flash faster (ISE only)
|
2014-08-22 18:44:10 +08:00 |
Sebastien Bourdeauducq
|
cb5894b33c
|
platforms: add -w option to bitgen_opt
|
2014-08-22 18:26:25 +08:00 |
Sebastien Bourdeauducq
|
35327a427f
|
targets/kc705: BIOS XIP
|
2014-08-22 17:13:10 +08:00 |
Sebastien Bourdeauducq
|
6b35c7b8ea
|
targets/ppro: reduce SPI flash clock frequency
|
2014-08-22 15:24:14 +08:00 |
Sebastien Bourdeauducq
|
7b10f1821f
|
targets/ppro: fix BIOS address
|
2014-08-22 15:24:00 +08:00 |
Florent Kermarrec
|
3eabec28cd
|
make.py: add set_flash_proxy_dir to flash-bios
|
2014-08-22 15:04:50 +08:00 |
Sebastien Bourdeauducq
|
2f2a57dd34
|
targets/ppro: clean up indentation
|
2014-08-22 14:41:28 +08:00 |
Florent Kermarrec
|
7f4e51253e
|
kc705: add spiflash pins
|
2014-08-22 10:32:58 +08:00 |
Florent Kermarrec
|
c19d134978
|
vivado: enable bitstream compression (optional)
|
2014-08-21 20:22:08 +08:00 |
Robert Jordens
|
bd232f3f61
|
fhdl.structure: do not permit clock domain names that start with numbers
|
2014-08-18 11:01:56 +08:00 |
Robert Jordens
|
ac2e961618
|
fhdl.structure: remove unused imports
|
2014-08-18 11:01:56 +08:00 |
Robert Jordens
|
6036fffef2
|
Signal.__getitem__: raise TypeError and IndexError when appropriate
|
2014-08-18 11:01:56 +08:00 |
Robert Jordens
|
b3d69913cd
|
Signal.like: pass kwargs
|
2014-08-18 11:01:56 +08:00 |