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281 Commits

Author SHA1 Message Date
numato e56d80c7a0 Adding support for Numato Lab Mimas V2 platform 2015-07-14 19:42:51 +02:00
Sebastien Bourdeauducq ea8ffd8e80 platforms/kc705: style 2015-07-14 19:42:44 +02:00
Robert Jordens 8d6aa82082 mibuild/openocd.py: add support 
Tested with pipistrello and kc705. Needs patches from
https://github.com/jordens/openocd/tree/bscan_spi waiting
to be merged in the openocd queue.
 2015-07-07 21:01:31 -06:00
Sebastien Bourdeauducq 73ea404380 Merge branch 'master' of https://github.com/m-labs/migen 2015-07-05 10:53:32 +02:00
Tim 'mithro' Ansell 1d1f8510d3 Allow using non-milkymist cables with UrJTAG. 2015-07-05 10:53:09 +02:00
Tim 'mithro' Ansell 0df9c16e69 mibuild: Adding error checking around xsvf generation 2015-07-02 16:51:03 +02:00
Tim 'mithro' Ansell 8daf5e32c1 Adding support for programming with FPGALink 
Steps for getting it set up.

 * Get libfpgalink dependencies
   sudo apt-get install \
      build-essential libreadline-dev libusb-1.0-0-dev python-yaml

 * Build libfpgalink
   wget -qO- http://tiny.cc/msbil | tar zxf -
   cd makestuff; ./scripts/msget.sh makestuff/common
   cd libs; ../scripts/msget.sh libfpgalink
   cd libfpgalink; make deps

 * Convert libfpgalink to python3
   wget -O - http://www.swaton.ukfsn.org/bin/2to3.tar.gz | tar zxf -
   cd examples/python
   cp fpgalink2.py fpgalink3.py
   ../../2to3/2to3 fpgalink3.py | patch fpgalink3.py

 * Set your path's correctly.

   export LD_LIBRARY_PATH=$(pwd)/libfpgalink/lin.x64/rel:$LD_LIBRARY_PATH
   export PYTHON_PATH=$(pwd)/libfpgalink/examples/python:$PYTHON_PATH
 2015-07-02 16:44:39 +02:00
Tim 'mithro' Ansell 055f7d51fc mibuild/xilinx: Adding programming with the Digilent Adept tools 2015-07-02 16:03:44 +02:00
Florent Kermarrec 7afa3d61d9 mibuild/xilinx: Xilinx's FPGAs do not necessary share the same primitives: add xilinx_s7_special_overrides and specific XilinxDDROutputS7 implementation 
Fix DDROutput implementation on spartan6 (tested with LiteETH's GMII phy)
 2015-07-02 09:42:12 +02:00
William D. Jones 445f0f5d40 Remove self.programmer references in Mercury, as mercury programmer is not implemented. 2015-06-28 18:06:50 +02:00
William D. Jones 3ea7ef81a9 Add Mercury dev board to mibuild (http://www.micro-nova.com/mercury/) 2015-06-28 16:30:41 +02:00
Florent Kermarrec 7d8f4d1009 mibuild/xilinx/ise: fix source and set source to False by default on Windows (tools supposed to be in the PATH) 2015-06-19 00:52:39 +02:00
Florent Kermarrec 743a5f6ea9 mibuild/xilinx/ise: simplify default_ise_path 2015-06-19 00:40:05 +02:00
William D. Jones 6370acd968 Xilinx Platforms now use cmd.exe on Windows instead of bash to run scripts 
(remove MSYS dependency)
 2015-06-19 00:30:22 +02:00
Yann Sionneau 6e876c63ad pipistrello: fix FPGA speed grade 2015-06-14 23:19:27 +02:00
Robert Jordens 99fb0d4619 ise: move -user_new_parser to xst_opt 2015-05-08 11:18:45 +08:00
Florent Kermarrec 70bc4ecb59 mibuild/platforms/pipistrello: add _n suffix to usb fifo pins 2015-05-01 15:49:33 +02:00
Florent Kermarrec aea7308051 mibuild/platforms/minispartan6: rename ftdi_fifo to usb_fifo and fix rd_n/wr_n swap 2015-05-01 15:48:42 +02:00
William D. Jones 472665b81d Add a command line option (-use_new_parser yes) to Xilinx XST to force use of the newer parser for older FPGAs. 2015-04-25 23:01:07 +08:00
Sebastien Bourdeauducq f57ee296a9 mibuild/altera: cleanup 2015-04-20 17:17:34 +08:00
Sebastien Bourdeauducq 65eeb33329 Revert "add I/O standard definitions to mibuild/altera" 
This reverts commit a889b41060.
 2015-04-20 16:22:32 +08:00
Alain Péteut a889b41060 add I/O standard definitions to mibuild/altera 2015-04-20 10:08:47 +02:00
Alain Péteut 1b050d98ea add differential in/out support to mibuild/altera 2015-04-20 10:08:26 +02:00
Alain Péteut fd966d70ba some PEP8 cosmetic 2015-04-20 10:03:08 +02:00
Florent Kermarrec 15625236c1 platforms/kc705: add PCIe pins 2015-04-17 00:51:16 +02:00
Florent Kermarrec 083d371af4 mibuild: add support for libraries, move .replace("\\", "/") to generic_platform.py and execute it only on Windows machines. 
We need to support libraries when Migen is used as a wrapper on large VHDL designs using libraries.
 2015-04-17 00:11:31 +02:00
Florent Kermarrec 482486706c mibuild/lattice: adapt diamond to last Migen changes 2015-04-13 21:40:58 +02:00
Florent Kermarrec d83e170872 global: more pep8 
we will have to continue the work... volunteers are welcome :)
 2015-04-13 21:33:44 +02:00
Florent Kermarrec 89bb90fe2a global: pep8 (E265) 2015-04-13 21:22:46 +02:00
Florent Kermarrec f97d7ff44c global: pep8 (E261, E271) 2015-04-13 21:21:30 +02:00
Florent Kermarrec 5f225c0475 global: pep8 (E225) 2015-04-13 21:11:13 +02:00
Florent Kermarrec 728c15213f global: pep8 (E222) 2015-04-13 20:55:21 +02:00
Florent Kermarrec 69764f2e22 global: pep8 (E401) 2015-04-13 20:54:19 +02:00
Florent Kermarrec 37ef9b6f3a global: pep8 (E231) 2015-04-13 20:50:03 +02:00
Florent Kermarrec 1051878f4c global: pep8 (E302) 2015-04-13 20:45:35 +02:00
Florent Kermarrec 17e5249be0 global: pep8 (replace tabs with spaces) 2015-04-13 20:07:07 +02:00
Sebastien Bourdeauducq e1702c422c introduce conversion output object (prevents file IO in FHDL backends) 2015-04-08 20:28:23 +08:00
Sebastien Bourdeauducq 8ce683964a mibuild/tools/write_to_file: use context manager 2015-04-08 19:41:54 +08:00
Robert Jordens aac953dd90 vivado: support phys_opt 2015-04-04 19:00:22 +08:00
Robert Jordens 9506f69390 vivado: add support for pre_synthesis_commands 2015-04-04 19:00:01 +08:00
Robert Jordens 4522956f11 vivado: make _build_files() a method and rename 2015-04-04 18:59:50 +08:00
Sebastien Bourdeauducq 1d1189506a mibuild: support multiple specifications of include file and sources 2015-04-04 18:58:02 +08:00
Yann Sionneau ce429841d5 kc705: fix typo in platform file (LPC definition) 2015-04-02 20:21:20 +08:00
Sebastien Bourdeauducq c169f0b189 Revert "migen: create VerilogConvert and EDIFConvert classes and return it with convert functions" 
This reverts commit f03aa76292.
 2015-03-30 19:41:16 +08:00
Florent Kermarrec 15e24b6c10 mibuild/platforms: fix minispartan6 2015-03-30 11:42:14 +02:00
Florent Kermarrec f03aa76292 migen: create VerilogConvert and EDIFConvert classes and return it with convert functions 2015-03-30 11:37:55 +02:00
Sebastien Bourdeauducq 21c5fb6f6c Merge branch 'master' of github.com:m-labs/migen 2015-03-30 00:52:15 +08:00
Sebastien Bourdeauducq 19a6157478 platforms/lx9_microboard,usrp_b100: fix bitgen opts 2015-03-30 00:44:56 +08:00
Florent Kermarrec 263fc47728 platforms/kc705: fix .bin generation with ISE and Vivado 2015-03-29 21:15:20 +08:00
Florent Kermarrec 17f3590a7c platforms/kc705: add iMPACT programmer 2015-03-29 12:15:39 +02:00