5 commits

Author	SHA1	Message	Date
Florent Kermarrec	649cdeb265	liteXXX cores: use new uart and import FlipFlop/Counter/Timeout from Migen	2015-03-01 16:48:41 +01:00
Florent Kermarrec	9e01bf5fdd	litesata: create example design derived from SoC	2015-03-01 11:33:38 +01:00
Florent Kermarrec	c21a7956c8	liteXXX cores: remove Identifier duplication	2015-03-01 11:24:58 +01:00
Florent Kermarrec	69e869893d	remane GenSoC to SoC (more coherent and we will add support for multiple SoCs with their own Wisbbone/CSR buses in the future)	2015-02-28 11:36:15 +01:00
Florent Kermarrec	0dfca49e68	litesata: move file and modify import to misoclib.mem.litesata	2015-02-28 11:03:24 +01:00