Hardware
/
litex
mirror of https://github.com/enjoy-digital/litex.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity
4,213 Commits 40 Branches 14 Tags 51 MiB
Commit Graph

4213 Commits

Author SHA1 Message Date
Sebastien Bourdeauducq 4ba796417d software: do not attempt to build network/sdram drivers when cores are not present 2013-11-24 23:50:09 +01:00
Sebastien Bourdeauducq d4063409e1 software/bios: infer flash start from linker 2013-11-24 23:45:03 +01:00
Sebastien Bourdeauducq 29f7b94e37 bus/wishbone/sram: expose memory component 2013-11-24 23:43:14 +01:00
Sebastien Bourdeauducq c5342c5b5c bus/wishbone: style 2013-11-24 23:42:54 +01:00
Sebastien Bourdeauducq 6e48682a5e platforms/papilio_pro: fix clock signal handling 2013-11-24 23:42:31 +01:00
Sebastien Bourdeauducq 07fc110fc1 allow BIOS data to be passed to design 2013-11-24 22:14:46 +01:00
Sebastien Bourdeauducq 257185cc9c rename create_sdram_modules and add register_rom 2013-11-24 20:16:19 +01:00
Sebastien Bourdeauducq fca0b968e7 generate linker memory map, move all generated files into the same folder 2013-11-24 19:50:17 +01:00
Sebastien Bourdeauducq b95563e45e add support for external platforms and targets 2013-11-24 16:55:33 +01:00
Sebastien Bourdeauducq c514fdc4a3 platforms/m1: use definition compatible with Mixxeo for VGA out 2013-11-24 14:00:22 +01:00
Sebastien Bourdeauducq bc2b4a888b memtest: flush caches, display total error count, use ifdef instead of comment 2013-11-24 13:59:45 +01:00
Sebastien Bourdeauducq b1d1f9ecde make.py: support extra SoC options 2013-11-24 13:59:15 +01:00
Sebastien Bourdeauducq fdff1ae5f8 make build system more generic 2013-11-24 13:37:32 +01:00
Sebastien Bourdeauducq 4a3a1d02e9 modularize SoC integration 2013-11-24 10:30:02 +01:00
Sebastien Bourdeauducq 4c50923cdf use new lasmibus.Crossbar master API 2013-11-23 17:51:41 +01:00
Sebastien Bourdeauducq 948d7e7332 lasmibus/Crossbar: more flexible master assignment 2013-11-23 17:51:22 +01:00
Sebastien Bourdeauducq 8efd9d11dc remove stale .gitignore 2013-11-23 15:16:27 +01:00
Sebastien Bourdeauducq eb1bd71808 update pointers 2013-11-23 11:29:57 +01:00
Sebastien Bourdeauducq 2160636a5e update pointers 2013-11-23 11:29:20 +01:00
Sebastien Bourdeauducq be3b603b17 merge Mibuild into Migen 2013-11-23 10:45:15 +01:00
Sebastien Bourdeauducq 62ec66bc00 Add 'mibuild/' from commit '9d5931c969810a236de2a2713cfd5e509839d097' 
git-subtree-dir: mibuild
git-subtree-mainline: 7e4024beb3
git-subtree-split: 9d5931c969
 2013-11-23 10:34:28 +01:00
Robert Jordens 7e4024beb3 genlib/fsm: rename {entering,leaving} to after_{entering,leaving}, add before_{entering,leaving} 2013-11-21 23:30:24 +01:00
Sebastien Bourdeauducq 7496ba6360 framebuffer: fix resynchronization after resolution change 2013-11-21 00:33:22 +01:00
Sebastien Bourdeauducq f5ba0ac023 videomixer: select 1024x768 by default 2013-11-21 00:33:01 +01:00
Sebastien Bourdeauducq cdabf34bee flow/isd: update to new APIs 2013-11-20 17:45:09 +01:00
Sebastien Bourdeauducq 96fcb3574e Revert "framebuffer: reset VTG" 
This reverts commit 6cb18f5ce3.

Conflicts:
	misoclib/framebuffer/__init__.py
	misoclib/framebuffer/format.py
 2013-11-19 23:48:00 +01:00
Sebastien Bourdeauducq 2eabf97147 dvisampler: transfer the last word in frames correctly 2013-11-19 23:38:48 +01:00
Sebastien Bourdeauducq 9d5931c969 platforms/mixxeo: update DVI input timing constraints 2013-11-19 23:15:42 +01:00
Sebastien Bourdeauducq f62615054d videomixer: stick to 20x PLL configuration as 10x causes traditional spartan6 weirdness 2013-11-18 20:43:30 +01:00
Sebastien Bourdeauducq a75be2e5dd videomixer: reconfigure PLL on resolution change 2013-11-18 20:37:45 +01:00
Sebastien Bourdeauducq 72001addcb videomixer: add PLL dump command 2013-11-18 20:37:27 +01:00
Sebastien Bourdeauducq 6fc03946be videomixer: add PLL control code 2013-11-18 20:37:10 +01:00
Sebastien Bourdeauducq 8b82575861 dvisampler: hold PLL in reset when disabled 2013-11-18 20:36:30 +01:00
Sebastien Bourdeauducq de76e91147 framebuffer: expose PLL DRP to CSR 2013-11-18 20:32:33 +01:00
Sebastien Bourdeauducq 9e883b8b02 dvisampler: expose PLL DRP to CSR 2013-11-18 20:32:21 +01:00
Sebastien Bourdeauducq 4cfcda6c8c framebuffer: unpack memory words in pixel clock domain for better perf 2013-11-17 23:41:18 +01:00
Sebastien Bourdeauducq 8f164d0d7b videomixer: reduce debug output 2013-11-17 23:40:42 +01:00
Sebastien Bourdeauducq 64bfca56b4 videomixer: add more video modes 2013-11-16 17:41:03 +01:00
Sebastien Bourdeauducq ba15f1581f videomixer: flush L2 after CPU framebuffer write 2013-11-16 16:27:58 +01:00
Sebastien Bourdeauducq c9e99dfca9 bios: flushl2 command 2013-11-16 16:27:34 +01:00
Sebastien Bourdeauducq c3d0985fb2 add L2 cache size in identifier + function to flush L2 2013-11-16 16:27:21 +01:00
Sebastien Bourdeauducq 940341b4bf videomixer: fix stray DMA detection 2013-11-16 13:53:38 +01:00
Sebastien Bourdeauducq 6f990a017e dvisampler: pack pixels in pixel clock domain to improve performance 2013-11-16 13:53:26 +01:00
Sebastien Bourdeauducq d225bdf362 videomixer: clear framebuffers 2013-11-15 11:25:58 +01:00
Sebastien Bourdeauducq 6cb18f5ce3 framebuffer: reset VTG 2013-11-15 11:25:07 +01:00
Sebastien Bourdeauducq a5d9f72901 videomixer: check resolution and frame length 2013-11-13 18:57:39 +01:00
Sebastien Bourdeauducq 34e8e8c259 dvisampler: update address CSR at end of DMA 2013-11-13 18:57:10 +01:00
Sebastien Bourdeauducq 1582bad2d6 videomixer: filter PLL lock output 2013-11-13 16:50:09 +01:00
Robert Jordens 1a28690fa0 microudp: fix udp txlen 
* the preample length 8 is already included in sizeof(struct
ethernet_header)
* the minimum packet size is 64, exluding fcs and including
preample it is 68 (the arp functions are correct)
 2013-11-12 19:05:15 +01:00
Sebastien Bourdeauducq 69568adb8e videomixer: support resolution change at runtime 2013-11-11 23:20:21 +01:00