Florent Kermarrec
|
d3974882e4
|
link: manage CONT on RX path
|
2014-12-03 11:50:31 +01:00 |
|
Florent Kermarrec
|
47a5a9529b
|
link: manage CONT on TX path
|
2014-12-03 11:12:26 +01:00 |
|
Florent Kermarrec
|
cab5b7b8f8
|
link: simplify BFM
|
2014-12-03 09:17:51 +01:00 |
|
Florent Kermarrec
|
6cc8686402
|
link: manage hold
|
2014-12-03 02:06:43 +01:00 |
|
Florent Kermarrec
|
ed97f378ff
|
link: add CRC check to BFM
|
2014-12-02 20:02:43 +01:00 |
|
Florent Kermarrec
|
f2757ef8dd
|
link: fix link_tb (due to others modifications)
|
2014-12-02 19:53:13 +01:00 |
|
Florent Kermarrec
|
31b9132dd9
|
link: improve and clean up crc_tb, scrambler_tb
|
2014-12-02 19:24:46 +01:00 |
Sebastien Bourdeauducq
|
aac34f011f
|
gensoc: support user-defined CSR regions
|
2014-11-30 22:29:26 +08:00 |
|
Sebastien Bourdeauducq
|
ae770c0f8c
|
bank: support direct mapping of CSRs on Wishbone
|
2014-11-30 22:28:39 +08:00 |
|
Sebastien Bourdeauducq
|
8ae3a00a94
|
gensoc: simplify WB address decoding
|
2014-11-30 22:05:51 +08:00 |
|
Sebastien Bourdeauducq
|
4189440eef
|
minicon: small simplifications
|
2014-11-28 08:28:39 +08:00 |
Yann Sionneau
|
edb1622668
|
spiflash: BB write support
|
2014-11-27 23:10:39 +08:00 |
|
Sebastien Bourdeauducq
|
bab6bb7c4a
|
gensoc: fix align
|
2014-11-27 23:05:36 +08:00 |
|
Sebastien Bourdeauducq
|
2cd80990e4
|
minicon: fix use of phy phases
|
2014-11-27 22:13:17 +08:00 |
|
Sebastien Bourdeauducq
|
8418ccafdc
|
minicon: remove unused signals and fix indent
|
2014-11-27 22:12:05 +08:00 |
|
Yann Sionneau
|
cf92821fcf
|
Refactor directory hierarchy of sdram phys and controllers
|
2014-11-27 22:09:10 +08:00 |
|
Yann Sionneau
|
f33b285af1
|
Minicon: small SDRAM controller
|
2014-11-27 22:09:03 +08:00 |
|
Yann Sionneau
|
ee928a8973
|
Wishbone DownConverter: Fix sel signal
|
2014-11-26 19:33:12 +08:00 |
|
Sebastien Bourdeauducq
|
4542de2c11
|
genlib/fsm: add NextValue to replace reg/reg_next/ce pattern
|
2014-11-25 17:16:21 +08:00 |
|
Sebastien Bourdeauducq
|
5801e5746b
|
fhdl/tools: do not attempt to rename sync clock domain if it does not exist
|
2014-11-21 14:51:05 -08:00 |
|
Florent Kermarrec
|
5202f89db1
|
ethmac/last_be: remove fake signal (fixed in Migen)
|
2014-11-21 14:48:17 -08:00 |
|
Sebastien Bourdeauducq
|
b7028848b2
|
ethmac: use new EndpointDescription API
|
2014-11-20 22:32:32 -08:00 |
|
Sebastien Bourdeauducq
|
eb47f458dd
|
flow: endpoint description structure with packetized parameter
|
2014-11-20 22:31:56 -08:00 |
|
Sebastien Bourdeauducq
|
f5fc4b365f
|
actorlib/fifo: add buffered parameter
|
2014-11-20 18:46:54 -08:00 |
|
Sebastien Bourdeauducq
|
33530e0921
|
ethmac: style/renaming
|
2014-11-20 18:01:48 -08:00 |
|
Sebastien Bourdeauducq
|
7eaa5f7372
|
targets/kc705: avoid ddrphy/ethphy address conflict
|
2014-11-20 17:11:57 -08:00 |
|
Florent Kermarec
|
603c2641bb
|
new Ethernet MAC
|
2014-11-20 16:47:22 -08:00 |
|
Florent Kermarrec
|
b87ad1af63
|
xilinx_vivado: use REM for comment on Windows
|
2014-11-20 15:27:14 -08:00 |
|
Sébastien Bourdeauducq
|
866757f80e
|
Merge pull request #8 from jix/fix-acitorlib-fifo
actorlib/fifo: fix no-op assignment due to .payload omission
|
2014-11-16 21:48:12 -07:00 |
Jannis Harder
|
f847faf004
|
actorlib/fifo: fix no-op assignment due to .payload omission
|
2014-11-14 21:25:19 +01:00 |
|
Florent Kermarrec
|
2b7779d3b6
|
link: wip bfm
|
2014-11-12 18:20:34 +01:00 |
|
Florent Kermarrec
|
b423c1df4b
|
link: prepare simulation
|
2014-11-11 18:47:34 +01:00 |
|
Florent Kermarrec
|
64ed34b35a
|
clean up
|
2014-11-11 16:15:28 +01:00 |
|
Florent Kermarrec
|
705819f885
|
use new EndpointDescription
|
2014-11-11 14:54:54 +01:00 |
|
Florent Kermarrec
|
67aaf09b53
|
link: SATALinkLayer skeleton
|
2014-11-11 12:29:37 +01:00 |
|
Florent Kermarrec
|
294855e292
|
phy: use primitives dict and use only sata.std
|
2014-11-11 10:19:24 +01:00 |
|
Florent Kermarrec
|
30964db4a1
|
phy: send 2 ALIGN primitives every 256 DWORDs
|
2014-11-11 09:57:43 +01:00 |
Guy Hutchison
|
9f2f8d279d
|
add hamming-code gen/check lib
|
2014-11-06 18:19:59 -08:00 |
|
Sebastien Bourdeauducq
|
f4d6ac8393
|
README: remove compiler-rt download instructions
|
2014-11-06 18:02:02 -08:00 |
|
Sebastien Bourdeauducq
|
09773df186
|
software: make compiler-rt a submodule
|
2014-11-06 18:00:28 -08:00 |
|
Sebastien Bourdeauducq
|
dff3a17711
|
mibuild/programmer: add migen folders to flash proxy search dirs
|
2014-11-05 23:23:22 +08:00 |
|
Florent Kermarrec
|
353e7fc13b
|
link: add SATALinkLayer skeleton (wip)
|
2014-11-04 22:55:31 +01:00 |
|
Florent Kermarrec
|
8f6354f2a3
|
link: improve crc_tb/ preamble_tb and increase length
|
2014-11-04 17:06:03 +01:00 |
|
Florent Kermarrec
|
c810009387
|
link: add Scrambler and testbench
|
2014-11-04 16:40:21 +01:00 |
|
Florent Kermarrec
|
8062298668
|
link: add CRC and testbench
|
2014-11-04 10:33:11 +01:00 |
|
Sebastien Bourdeauducq
|
7d15e91e26
|
vpi/ipc: fix decoding of index buffer
|
2014-11-04 16:57:34 +08:00 |
|
Florent Kermarrec
|
449daedab7
|
sata/link: add crc and scrambler C models from SATA specification
|
2014-11-03 18:11:14 +01:00 |
|
Florent Kermarrec
|
47b5ff5e33
|
move code and create a directory for each layer
|
2014-11-03 17:38:12 +01:00 |
|
Sebastien Bourdeauducq
|
ccc9a0d334
|
test/test_size: fix slice comparison
|
2014-11-03 12:08:43 +08:00 |
|
Sebastien Bourdeauducq
|
dcedc4e6a5
|
actorlib/structuring/Pipeline: make 'busy' a signal
|
2014-11-01 21:48:02 +08:00 |