Sebastien Bourdeauducq
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611c4192b1
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Use migen.fhdl.std
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2013-05-22 17:10:13 +02:00 |
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Sebastien Bourdeauducq
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43ac5c8471
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Remove undriven reset signals
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2013-04-25 20:19:49 +02:00 |
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Sebastien Bourdeauducq
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8914969760
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dvisampler/clocking: insert DCM_CLKGEN before PLL
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2013-04-14 16:53:19 +02:00 |
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Sebastien Bourdeauducq
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4f4f260e76
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Convert to new CSR API
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2013-03-30 17:28:15 +01:00 |
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Sebastien Bourdeauducq
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1e860c7472
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Use new Mibuild generic_platform API
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2013-03-26 17:57:17 +01:00 |
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Sebastien Bourdeauducq
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fa2331e084
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dvisampler/clocking: generate pix reset
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2013-03-21 19:02:04 +01:00 |
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Sebastien Bourdeauducq
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0a14c3714b
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dvisampler: software controlled phase detector
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2013-03-21 00:46:29 +01:00 |
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Sebastien Bourdeauducq
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28cb97068c
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dvisampler/clocking: proper pix5x reset synchronization
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2013-03-18 20:31:59 +01:00 |
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Sebastien Bourdeauducq
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5126f616fb
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dvisampler: use pix5x as IODELAY clock
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2013-03-18 19:03:17 +01:00 |
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Sebastien Bourdeauducq
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3a0cf278fd
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dvisampler: fixes
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2013-03-17 15:41:50 +01:00 |
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Sebastien Bourdeauducq
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9f02ced39e
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dvisampler: add clocking and phase detector
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2013-03-17 14:43:10 +01:00 |