picorv32/Makefile

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Makefile
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RISCV_GNU_TOOLCHAIN_GIT_REVISION = cb6b34b
RISCV_GNU_TOOLCHAIN_INSTALL_PREFIX = /opt/riscv32
SHELL = bash
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TEST_OBJS = $(addsuffix .o,$(basename $(wildcard tests/*.S)))
FIRMWARE_OBJS = firmware/start.o firmware/irq.o firmware/print.o firmware/sieve.o firmware/multest.o firmware/stats.o
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GCC_WARNS = -Werror -Wall -Wextra -Wshadow -Wundef -Wpointer-arith -Wcast-qual -Wcast-align -Wwrite-strings
GCC_WARNS += -Wredundant-decls -Wstrict-prototypes -Wmissing-prototypes -pedantic # -Wconversion
TOOLCHAIN_PREFIX = $(RISCV_GNU_TOOLCHAIN_INSTALL_PREFIX)i/bin/riscv32-unknown-elf-
COMPRESSED_ISA = C
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# Add things like "export http_proxy=... https_proxy=..." here
GIT_ENV = true
test: testbench.vvp firmware/firmware.hex
vvp -N $<
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test_vcd: testbench.vvp firmware/firmware.hex
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vvp -N $< +vcd +trace +noerror
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test_rvf: testbench_rvf.vvp firmware/firmware.hex
vvp -N $< +vcd +trace +noerror
test_wb: testbench_wb.vvp firmware/firmware.hex
vvp -N $<
test_wb_vcd: testbench_wb.vvp firmware/firmware.hex
vvp -N $< +vcd +trace +noerror
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test_ez: testbench_ez.vvp
vvp -N $<
test_ez_vcd: testbench_ez.vvp
vvp -N $< +vcd
test_sp: testbench_sp.vvp firmware/firmware.hex
vvp -N $<
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test_axi: testbench.vvp firmware/firmware.hex
vvp -N $< +axi_test
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test_synth: testbench_synth.vvp firmware/firmware.hex
vvp -N $<
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test_verilator: testbench_verilator firmware/firmware.hex
./testbench_verilator
testbench.vvp: testbench.v picorv32.v
iverilog -o $@ $(subst C,-DCOMPRESSED_ISA,$(COMPRESSED_ISA)) $^
chmod -x $@
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testbench_rvf.vvp: testbench.v picorv32.v rvfimon.v
iverilog -o $@ -D RISCV_FORMAL $(subst C,-DCOMPRESSED_ISA,$(COMPRESSED_ISA)) $^
chmod -x $@
testbench_wb.vvp: testbench_wb.v picorv32.v
iverilog -o $@ $(subst C,-DCOMPRESSED_ISA,$(COMPRESSED_ISA)) $^
chmod -x $@
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testbench_ez.vvp: testbench_ez.v picorv32.v
iverilog -o $@ $(subst C,-DCOMPRESSED_ISA,$(COMPRESSED_ISA)) $^
chmod -x $@
testbench_sp.vvp: testbench.v picorv32.v
iverilog -o $@ $(subst C,-DCOMPRESSED_ISA,$(COMPRESSED_ISA)) -DSP_TEST $^
chmod -x $@
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testbench_synth.vvp: testbench.v synth.v
iverilog -o $@ -DSYNTH_TEST $^
chmod -x $@
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testbench_verilator: testbench.v picorv32.v
verilator --cc --exe -Wno-lint -trace --top-module picorv32_wrapper testbench.v picorv32.v testbench.cc \
$(subst C,-DCOMPRESSED_ISA,$(COMPRESSED_ISA)) --Mdir testbench_verilator_dir
$(MAKE) -C testbench_verilator_dir -f Vpicorv32_wrapper.mk
cp testbench_verilator_dir/Vpicorv32_wrapper testbench_verilator
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check: check-yices
check-%: check.smt2
yosys-smtbmc -s $(subst check-,,$@) -t 30 --dump-vcd check.vcd check.smt2
yosys-smtbmc -s $(subst check-,,$@) -t 25 --dump-vcd check.vcd -i check.smt2
check.smt2: picorv32.v
yosys -v2 -p 'read_verilog -formal picorv32.v' \
-p 'prep -top picorv32 -nordff' \
-p 'assertpmux -noinit; opt -fast' \
-p 'write_smt2 -wires check.smt2'
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synth.v: picorv32.v scripts/yosys/synth_sim.ys
yosys -qv3 -l synth.log scripts/yosys/synth_sim.ys
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firmware/firmware.hex: firmware/firmware.bin firmware/makehex.py
python3 firmware/makehex.py $< 16384 > $@
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firmware/firmware.bin: firmware/firmware.elf
$(TOOLCHAIN_PREFIX)objcopy -O binary $< $@
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chmod -x $@
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firmware/firmware.elf: $(FIRMWARE_OBJS) $(TEST_OBJS) firmware/sections.lds
$(TOOLCHAIN_PREFIX)gcc -Os -ffreestanding -nostdlib -o $@ \
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-Wl,-Bstatic,-T,firmware/sections.lds,-Map,firmware/firmware.map,--strip-debug \
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$(FIRMWARE_OBJS) $(TEST_OBJS) -lgcc
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chmod -x $@
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firmware/start.o: firmware/start.S
$(TOOLCHAIN_PREFIX)gcc -c -march=rv32im$(subst C,c,$(COMPRESSED_ISA)) -o $@ $<
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firmware/%.o: firmware/%.c
$(TOOLCHAIN_PREFIX)gcc -c -march=rv32i$(subst C,c,$(COMPRESSED_ISA)) -Os --std=c99 $(GCC_WARNS) -ffreestanding -nostdlib -o $@ $<
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tests/%.o: tests/%.S tests/riscv_test.h tests/test_macros.h
$(TOOLCHAIN_PREFIX)gcc -c -march=rv32im -o $@ -DTEST_FUNC_NAME=$(notdir $(basename $<)) \
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-DTEST_FUNC_TXT='"$(notdir $(basename $<))"' -DTEST_FUNC_RET=$(notdir $(basename $<))_ret $<
download-tools:
sudo bash -c 'set -ex; mkdir -p /var/cache/distfiles; $(GIT_ENV); \
$(foreach REPO,riscv-gnu-toolchain riscv-binutils-gdb riscv-dejagnu riscv-gcc riscv-glibc riscv-newlib riscv-qemu, \
if ! test -d /var/cache/distfiles/$(REPO).git; then rm -rf /var/cache/distfiles/$(REPO).git.part; \
git clone --bare https://github.com/riscv/$(REPO) /var/cache/distfiles/$(REPO).git.part; \
mv /var/cache/distfiles/$(REPO).git.part /var/cache/distfiles/$(REPO).git; else \
(cd /var/cache/distfiles/$(REPO).git; git fetch https://github.com/riscv/$(REPO)); fi;)'
define build_tools_template
build-$(1)-tools:
@read -p "This will remove all existing data from $(RISCV_GNU_TOOLCHAIN_INSTALL_PREFIX)$(subst riscv32,,$(1)). Type YES to continue: " reply && [[ "$$$$reply" == [Yy][Ee][Ss] || "$$$$reply" == [Yy] ]]
sudo bash -c "set -ex; rm -rf $(RISCV_GNU_TOOLCHAIN_INSTALL_PREFIX)$(subst riscv32,,$(1)); mkdir -p $(RISCV_GNU_TOOLCHAIN_INSTALL_PREFIX)$(subst riscv32,,$(1)); chown $$$${USER}. $(RISCV_GNU_TOOLCHAIN_INSTALL_PREFIX)$(subst riscv32,,$(1))"
+$(MAKE) build-$(1)-tools-bh
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build-$(1)-tools-bh:
+set -ex; $(GIT_ENV); \
if [ -d /var/cache/distfiles/riscv-gnu-toolchain.git ]; then reference_riscv_gnu_toolchain="--reference /var/cache/distfiles/riscv-gnu-toolchain.git"; else reference_riscv_gnu_toolchain=""; fi; \
if [ -d /var/cache/distfiles/riscv-binutils-gdb.git ]; then reference_riscv_binutils_gdb="--reference /var/cache/distfiles/riscv-binutils-gdb.git"; else reference_riscv_binutils_gdb=""; fi; \
if [ -d /var/cache/distfiles/riscv-dejagnu.git ]; then reference_riscv_dejagnu="--reference /var/cache/distfiles/riscv-dejagnu.git"; else reference_riscv_dejagnu=""; fi; \
if [ -d /var/cache/distfiles/riscv-gcc.git ]; then reference_riscv_gcc="--reference /var/cache/distfiles/riscv-gcc.git"; else reference_riscv_gcc=""; fi; \
if [ -d /var/cache/distfiles/riscv-glibc.git ]; then reference_riscv_glibc="--reference /var/cache/distfiles/riscv-glibc.git"; else reference_riscv_glibc=""; fi; \
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if [ -d /var/cache/distfiles/riscv-newlib.git ]; then reference_riscv_newlib="--reference /var/cache/distfiles/riscv-newlib.git"; else reference_riscv_newlib=""; fi; \
if [ -d /var/cache/distfiles/riscv-qemu.git ]; then reference_riscv_qemu="--reference /var/cache/distfiles/riscv-qemu.git"; else reference_riscv_qemu=""; fi; \
rm -rf riscv-gnu-toolchain-$(1); git clone $$$$reference_riscv_gnu_toolchain https://github.com/riscv/riscv-gnu-toolchain riscv-gnu-toolchain-$(1); \
cd riscv-gnu-toolchain-$(1); git checkout $(RISCV_GNU_TOOLCHAIN_GIT_REVISION); \
git submodule update --init $$$$reference_riscv_binutils_gdb riscv-binutils; \
git submodule update --init $$$$reference_riscv_binutils_gdb riscv-gdb; \
git submodule update --init $$$$reference_riscv_dejagnu riscv-dejagnu; \
git submodule update --init $$$$reference_riscv_gcc riscv-gcc; \
git submodule update --init $$$$reference_riscv_glibc riscv-glibc; \
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git submodule update --init $$$$reference_riscv_newlib riscv-newlib; \
git submodule update --init $$$$reference_riscv_qemu riscv-qemu; \
mkdir build; cd build; ../configure --with-arch=$(2) --prefix=$(RISCV_GNU_TOOLCHAIN_INSTALL_PREFIX)$(subst riscv32,,$(1)); make
.PHONY: build-$(1)-tools
endef
$(eval $(call build_tools_template,riscv32i,rv32i))
$(eval $(call build_tools_template,riscv32ic,rv32ic))
$(eval $(call build_tools_template,riscv32im,rv32im))
$(eval $(call build_tools_template,riscv32imc,rv32imc))
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build-tools:
@echo "This will remove all existing data from $(RISCV_GNU_TOOLCHAIN_INSTALL_PREFIX)i, $(RISCV_GNU_TOOLCHAIN_INSTALL_PREFIX)ic, $(RISCV_GNU_TOOLCHAIN_INSTALL_PREFIX)im, and $(RISCV_GNU_TOOLCHAIN_INSTALL_PREFIX)imc."
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@read -p "Type YES to continue: " reply && [[ "$$reply" == [Yy][Ee][Ss] || "$$reply" == [Yy] ]]
sudo bash -c "set -ex; rm -rf $(RISCV_GNU_TOOLCHAIN_INSTALL_PREFIX){i,ic,im,imc}; mkdir -p $(RISCV_GNU_TOOLCHAIN_INSTALL_PREFIX){i,ic,im,imc}; chown $${USER}. $(RISCV_GNU_TOOLCHAIN_INSTALL_PREFIX){i,ic,im,imc}"
+$(MAKE) build-riscv32i-tools-bh
+$(MAKE) build-riscv32ic-tools-bh
+$(MAKE) build-riscv32im-tools-bh
+$(MAKE) build-riscv32imc-tools-bh
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toc:
gawk '/^-+$$/ { y=tolower(x); gsub("[^a-z0-9]+", "-", y); gsub("-$$", "", y); printf("- [%s](#%s)\n", x, y); } { x=$$0; }' README.md
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clean:
rm -rf riscv-gnu-toolchain-riscv32i riscv-gnu-toolchain-riscv32ic \
riscv-gnu-toolchain-riscv32im riscv-gnu-toolchain-riscv32imc
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rm -vrf $(FIRMWARE_OBJS) $(TEST_OBJS) check.smt2 check.vcd synth.v synth.log \
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firmware/firmware.elf firmware/firmware.bin firmware/firmware.hex firmware/firmware.map \
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testbench.vvp testbench_sp.vvp testbench_synth.vvp testbench_ez.vvp \
testbench_rvf.vvp testbench_wb.vvp testbench.vcd testbench.trace \
testbench_verilator testbench_verilator_dir
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.PHONY: test test_vcd test_sp test_axi test_wb test_wb_vcd test_ez test_ez_vcd test_synth download-tools build-tools toc clean