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picorv32
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459 Commits 2 Branches 1 Tag 2.8 MiB
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19 Commits

Author SHA1 Message Date
Clifford Wolf f29376ac22 assembler support for custom0 is deprecated, using cpp macros now 2016-12-09 14:48:37 +01:00
Clifford Wolf 7094e61af7 Added tracer support (under construction) 2016-08-25 14:15:42 +02:00
Clifford Wolf f4bb91b060 RISC-V ISA 2.1 now calls "sbreak" officially "ebreak" 2016-06-06 10:46:52 +02:00
Clifford Wolf 00dd6ac38e Added ENABLE_DIV and picorv32_pcpi_div 2016-04-10 16:54:35 +02:00
Clifford Wolf 45d117fb87 Added ENABLE_FASTIRQ switch in start.S 2016-01-21 11:58:38 +01:00
Clifford Wolf c48a3b2434 Removed trailing whitespaces 2015-07-02 10:49:35 +02:00
Clifford Wolf 46026ba985 Added ENABLE_IRQ_QREGS and ENABLE_IRQ_TIMER 2015-06-28 22:09:51 +02:00
Clifford Wolf e5e5494ca2 Improved start.S IRQ code 2015-06-28 20:52:52 +02:00
Clifford Wolf e34dcf77e3 Fixed typo in firmware/start.S 2015-06-28 14:56:26 +02:00
Clifford Wolf 1f99de5117 Improvements in picorv32_pcpi_mul 2015-06-28 13:07:50 +02:00
Clifford Wolf 818faffe25 Improved IRQ documentation, added assembler macros 2015-06-28 02:10:45 +02:00
Clifford Wolf d0100f72b5 Added ENABLE defines for individual tests 2015-06-27 22:31:24 +02:00
Clifford Wolf 7b17773bfc Added mul tests from riscv-tests 2015-06-27 22:18:24 +02:00
Clifford Wolf 0be990bd04 Added Pico Co-Processor Interface (PCPI) 2015-06-26 23:15:35 +02:00
Clifford Wolf 5d4ce82050 Implemented waitirq instruction 2015-06-26 10:39:08 +02:00
Clifford Wolf 9a4a06d981 Refactoring of IRQ handling 2015-06-26 10:03:37 +02:00
Clifford Wolf 23b700cf73 Added basic IRQ support 2015-06-25 14:08:39 +02:00
Clifford Wolf e84f044bc5 Major redesign of main FSM 2015-06-07 11:49:47 +02:00
Clifford Wolf 77ba5a1897 Initial import 2015-06-06 14:14:32 +02:00