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569 Commits

Author SHA1 Message Date
Florent Kermarrec 23ccdc9c0c modules: add DDR3 MT8KTF51264 SO-DIMM 2019-09-09 08:47:29 +02:00
Florent Kermarrec d37a30e0d7 litedram_gen: add wishbone user port support 2019-09-03 23:47:08 +02:00
Florent Kermarrec b6a0eff2d9 frontend/wishbone: split control/data paths (to avoid data muxes) 2019-09-03 12:44:07 +02:00
Florent Kermarrec 6497343fc0 frontend/wishbone: remove IDLE fsm state 2019-09-03 12:37:31 +02:00
Florent Kermarrec 00ecb871c4 gen: add separators 2019-09-03 12:37:05 +02:00
Florent Kermarrec a782eb5aa8 test/test_examples: adapt for travis 2019-08-31 14:55:14 +02:00
Florent Kermarrec f678efa02b travis: add pyyaml 2019-08-29 12:13:05 +02:00
enjoy-digital 8861d8058a
Merge pull request #91 from sd-fritze/master 
modules: Add support for Micron MT47H32M16 DDR2 RAM
 2019-08-31 13:59:40 +02:00
gruetzkopf fe2cc948dc modules: Add support for Micron MT47H32M16 DDR2 RAM 2019-08-31 12:05:07 +02:00
Florent Kermarrec a23b9e7877 core/refresher: set cmd.valid to 0 when sequencer done 2019-08-30 08:55:38 +02:00
Florent Kermarrec 12ddc135be litedram/gen: add description and switch to argparse 2019-08-28 08:07:20 +02:00
Florent Kermarrec 2bdeda021b move standalone core generation to litedram package and make it usable externally 
When LiteDRAM is installed, standalone core can now be generated with "litedram_gen config.yml"
 2019-08-28 07:19:30 +02:00
Florent Kermarrec 0dde125740 examples/litedram_gen: fix #!/usr/bin/env python3 location 2019-08-28 07:09:58 +02:00
Florent Kermarrec 602ff8be81 examples: switch to YAML config files 2019-08-28 07:08:10 +02:00
Florent Kermarrec fb28f791c8 core/refresher: remove load/load_count on RefreshTimer (not used) 2019-08-16 08:52:36 +02:00
Florent Kermarrec 1c69f49760 core/controller: allow user provided Refresher 2019-08-16 08:39:08 +02:00
Florent Kermarrec b64daba711 core/controller: add separators, ease readibility 2019-08-16 08:37:08 +02:00
Florent Kermarrec 338d18dba0 core/refresher: add capability to accumulate N refreshs and execute the N refreshs together 
Being able to accumulate refreshs allow reducing the number of interruptions to the Controller from 1 every tREFI cycles to 1 every N*tREFI cycles.
 2019-08-14 09:57:24 +02:00
Florent Kermarrec 818c4ca9db core/refresher: another cleanup pass 2019-08-14 09:07:49 +02:00
Florent Kermarrec 80c8ecf477 core/multiplexer: rewrite arbiter comment 2019-08-14 08:59:49 +02:00
Florent Kermarrec 37db41648e core/refresher: another cleanup pass 2019-08-14 08:50:34 +02:00
Florent Kermarrec f0592ff89f core/refresher: add comments 2019-08-14 08:30:25 +02:00
Florent Kermarrec de38b52eb6 core/refresher: rename RefreshGenerator to RefreshSequencer and simplify 2019-08-14 08:08:30 +02:00
Florent Kermarrec 8573c22cc1 phy/gensdrphy: add assertions on length of pads.dq/pads.dq 
Allow detecting platform file issues similar to #88, #89 earlier.
 2019-08-04 15:06:34 +02:00
Florent Kermarrec 6c53996a70 core/refresher: reduce refresh period by one cycle 2019-07-24 08:18:04 +02:00
Florent Kermarrec afb6d0a15e core/refresher: reduce RefreshGenerator start delay by 1 cycle 2019-07-24 08:01:54 +02:00
Florent Kermarrec b543286d06 test/test_refresh: add Refresher test 2019-07-23 22:31:27 +02:00
Florent Kermarrec 7daf3551f6 test/test_bist: remove vcd generation (only useful for debug) 2019-07-23 21:46:03 +02:00
Florent Kermarrec b4125fa50f test/test_refresh: add RefreshTimer test 2019-07-23 21:44:09 +02:00
Florent Kermarrec 9584c2fe88 test: remove use of rand_wait, rename rand_level to random 2019-07-23 21:14:17 +02:00
Florent Kermarrec 0eef5d4d55 test: add test_refresh with simple RefreshGenerator test 2019-07-23 16:36:21 +02:00
Florent Kermarrec 93488009c9 test: rename test_timing_controllers to test_timing 2019-07-23 16:05:31 +02:00
Florent Kermarrec 8cf561d620 test/test_timing_controllers: add simple tFAWController tests 2019-07-23 15:58:26 +02:00
Florent Kermarrec 3ae666d015 test/test_timing_controllers: add simple tXXDController tests 2019-07-23 15:48:32 +02:00
Florent Kermarrec 394a49a759 test: add test_timing_controllers with tXXDController test 2019-07-23 12:40:40 +02:00
Florent Kermarrec 6e3f7691c5 core: move timing controllers to common 2019-07-23 12:39:14 +02:00
Florent Kermarrec 54cdc7f4cb test: -x on tests 2019-07-23 12:16:44 +02:00
Florent Kermarrec 2ecb0534ec frontend/ecc: move generic part of ECC to LiteX 2019-07-13 11:47:13 +02:00
Florent Kermarrec 8646b2e2c4 test/test_adaption: use same DUT for up/down converter tests 2019-07-13 10:52:41 +02:00
Florent Kermarrec 9f9fed02f6 test: merge test_downconverter/test_upconverter in a single test_adaptation file 2019-07-13 10:31:30 +02:00
Florent Kermarrec fc41751080 frontend/dma: simplify rsv_level expose 2019-07-05 11:30:57 +02:00
enjoy-digital 88835de734
Merge pull request #86 from sergachev/master 
dma: expose reservation level in the reader
 2019-07-05 11:29:26 +02:00
Ilia Sergachev f145287fdc dma: expose reservation level in the reader 2019-07-05 09:57:13 +02:00
Florent Kermarrec f018c9e268 add CONTRIBUTORS file and add copyright header to all files. 2019-06-23 23:59:10 +02:00
Florent Kermarrec 18dda2db54 phy/s7ddrphy: increase _half_sys8x_taps CSR to 5 bits 2019-06-22 10:46:02 +02:00
Florent Kermarrec 690e4f848f README: fix ECP5 frequency ratio 2019-06-16 21:35:46 +02:00
enjoy-digital 67de3cee14
Merge pull request #85 from antmicro/fix_databits 
PhySettings: set missing databits parameter for S6QuarterRateDDRPHY
 2019-06-13 16:55:11 +02:00
Mateusz Holenko 24851c9a3b PhySettings: set missing databits parameter for S6QuarterRateDDRPHY 2019-06-13 15:41:47 +02:00
Florent Kermarrec fef530366a test: clean test_downconverter/test_upconverter (thanks sb0) 2019-06-13 09:15:09 +02:00
enjoy-digital 7fbe0b712c
Merge pull request #84 from open-design/is42s16320 
modules: SDRAM: add IS42S16320 support
 2019-06-02 18:38:12 +02:00