Florent Kermarrec
|
b258c9a913
|
test: add bist_async_tb and some fixes
|
2016-05-23 17:20:42 +02:00 |
|
Florent Kermarrec
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cb42ea510d
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frontend/bist: LiteDRAMBISTChecker can now be asynchronous
|
2016-05-23 14:26:53 +02:00 |
|
Florent Kermarrec
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cb324ea47c
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frontend/bist: LiteDRAMBISTGenerator can now be asynchronous
|
2016-05-23 14:17:22 +02:00 |
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Florent Kermarrec
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f36c65b66f
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test: move DRAMMemory model to common
|
2016-05-23 13:30:38 +02:00 |
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Florent Kermarrec
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94d526a78c
|
test/bist_tb: adapt to new interface
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2016-05-23 13:27:29 +02:00 |
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Florent Kermarrec
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a016a820b5
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common/LiteDRAMPort: add defaut cd value
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2016-05-18 15:49:44 +02:00 |
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Florent Kermarrec
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8d066caea9
|
common: use cmd/wdata/rdata stream on LiteDRAMPort
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2016-05-13 15:46:15 +02:00 |
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Florent Kermarrec
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30bacfeb1b
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frontend: add LiteDRAMAsyncAdapter for asynchronous ports (need more tests)
|
2016-05-13 15:27:12 +02:00 |
|
Florent Kermarrec
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19a0bd59d2
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frontend/dma: use stream.SyncFIFO
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2016-05-13 13:35:59 +02:00 |
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Florent Kermarrec
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8b98dd3c8a
|
frontend: simplify wdata/wdata_we on user side (implement the mux in the crossbar)
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2016-05-12 15:34:39 +02:00 |
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Florent Kermarrec
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9d2c8bf1cf
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frontend: remove geom/timing parameters from LiteDRAMPort since this prevent providing async or arbitraty length port easily
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2016-05-09 12:07:06 +02:00 |
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Florent Kermarrec
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d7458a3c34
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test: remove common
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2016-05-04 01:16:29 +02:00 |
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Florent Kermarrec
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92c036e72b
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remove example_designs for now (examples are in LiteX)
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2016-05-04 01:15:19 +02:00 |
|
Florent Kermarrec
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bb214ce895
|
README: remove wip banner and add Features
|
2016-05-04 01:13:00 +02:00 |
|
Florent Kermarrec
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68e4b9322c
|
phy/s6ddrphy: fix
|
2016-05-04 01:10:44 +02:00 |
|
Florent Kermarrec
|
bb67fdba57
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core/perf: fix
|
2016-05-04 00:26:32 +02:00 |
|
Florent Kermarrec
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37c9d6dd46
|
frontend/bist: fix missing AutoCSR
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2016-05-04 00:26:24 +02:00 |
|
Florent Kermarrec
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a40b0f760c
|
test/bist_tb: cleanup and add error check
|
2016-05-03 22:22:11 +02:00 |
|
Florent Kermarrec
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836a9d4f00
|
test: removed bank_machine_tb (should be rewritten)
|
2016-05-03 19:25:39 +02:00 |
|
Florent Kermarrec
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812d7dd7f0
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frontend/bist: reword bist, add simulation, seems to work but need more testing
|
2016-05-03 19:24:33 +02:00 |
|
Florent Kermarrec
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4c1b97b465
|
core/refresher: remove req/ack signal and use stream
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2016-05-03 17:45:57 +02:00 |
|
Florent Kermarrec
|
3d9ea833dd
|
frontend/crossbar: continue cleanup/simplify
|
2016-05-03 17:24:11 +02:00 |
|
Florent Kermarrec
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2ef8879661
|
frontend/crossbar: replace rr by arbiter
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2016-05-03 17:14:03 +02:00 |
|
Florent Kermarrec
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2709efa4a7
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frontend/crossbar: remove controller_selected (no longer needed)
|
2016-05-03 17:11:34 +02:00 |
|
Florent Kermarrec
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e712a9d565
|
changes names on cmd_layout and data_layout
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2016-05-03 17:02:59 +02:00 |
|
Florent Kermarrec
|
6e15824161
|
core: replace lasmic with interface and some cleanup
|
2016-05-03 16:55:54 +02:00 |
|
Florent Kermarrec
|
8c0e732c24
|
core: use a single structure to pass settings / simplify
|
2016-05-02 21:38:18 +02:00 |
|
Florent Kermarrec
|
7ce42d5324
|
bankmachine: rename fifo to cmd_buffer and allow depth < 2 (will be used to reduce logic when performance is not the priority)
|
2016-05-02 20:50:55 +02:00 |
|
Florent Kermarrec
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8d29e5a905
|
bank_machine: cleanup/pep8
|
2016-05-02 16:06:37 +02:00 |
|
Florent Kermarrec
|
d3ff63b978
|
multiplexer: cleanup/pep8
|
2016-05-02 15:57:39 +02:00 |
|
Florent Kermarrec
|
3177f7964f
|
multiplexer: rewrite/simplify CommandChooser
|
2016-05-02 15:37:12 +02:00 |
|
Florent Kermarrec
|
fb98d12241
|
only use positive logic in the controller(cas/ras/we) and use Record/stream.Endpoint for command requests
|
2016-05-02 12:18:56 +02:00 |
|
Florent Kermarrec
|
cbe9748fa1
|
continue cleanup
|
2016-05-02 09:48:17 +02:00 |
|
Florent Kermarrec
|
f37fc3d854
|
common: split Interface in InternalInterface/UserInterface
|
2016-05-02 09:20:12 +02:00 |
|
Florent Kermarrec
|
52a0f4e617
|
stb/req_ack becomes valid/ready + others small cleanup
|
2016-05-02 09:13:09 +02:00 |
|
Florent Kermarrec
|
19e84975f6
|
core/bankmachine: small cleanup
|
2016-05-01 12:43:33 +02:00 |
|
Florent Kermarrec
|
82e42bb500
|
core/perf: remove _ on CSRs
|
2016-05-01 12:27:50 +02:00 |
|
Florent Kermarrec
|
b874500b77
|
core/refresher: simplify/cleanup
|
2016-05-01 12:15:49 +02:00 |
|
Florent Kermarrec
|
400de46980
|
frotend/crossbar: make parameters public
|
2016-05-01 12:08:03 +02:00 |
|
Florent Kermarrec
|
cb32238b01
|
core/bankmachine: replace fifo with stream.SyncFIFO
|
2016-05-01 12:00:48 +02:00 |
|
Florent Kermarrec
|
ca9d33da83
|
phy: add small description on a7ddrphy/k7ddrphy
|
2016-05-01 10:21:22 +02:00 |
|
Florent Kermarrec
|
802227bbcf
|
model: move in phy
|
2016-05-01 10:20:05 +02:00 |
|
Florent Kermarrec
|
3cf8b07b8a
|
core: add with_refresh parameter (to be able to desactivate refresh during simulation)
|
2016-04-29 23:01:55 +02:00 |
|
Florent Kermarrec
|
9d30fb4111
|
frontend: rename tester to bist
|
2016-04-29 19:28:41 +02:00 |
|
Florent Kermarrec
|
1dac3fb7ba
|
common: remove use of namedtuple (to improve readibility)
|
2016-04-29 19:22:06 +02:00 |
|
Florent Kermarrec
|
297c85d6cf
|
move SDRAM modules in modules.py and others settings in common.py
|
2016-04-29 19:08:56 +02:00 |
|
Florent Kermarrec
|
3dab76514a
|
frontend/crossbar: get_master --> get_port
|
2016-04-29 17:42:32 +02:00 |
|
Florent Kermarrec
|
c8d2850e8c
|
frontend: dma_lasmi --> dma, wishbone2lasmi --> bridge
|
2016-04-29 17:42:07 +02:00 |
|
Florent Kermarrec
|
97fb293109
|
core/controller: aerate code
|
2016-04-29 17:28:58 +02:00 |
|
Florent Kermarrec
|
997c1ce707
|
rename bus to common
|
2016-04-29 17:15:06 +02:00 |