Florent Kermarrec
|
ad8ca86e13
|
frontend/adaptation: implement LiteDRAMReadPortUpConverter correctly
still some corner cases to manage
|
2016-06-15 23:57:16 +02:00 |
Florent Kermarrec
|
5823373243
|
frontend: introduce mode on ports: write, read or both
|
2016-06-15 17:51:46 +02:00 |
Florent Kermarrec
|
b0382e8776
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frontend/crossbar: add clock domain crossing and data width convertion to get_port
|
2016-06-13 14:41:57 +02:00 |
Florent Kermarrec
|
ed997f1cfe
|
core: fix refresh (bug was reducing controller throughput by 2)
|
2016-06-13 13:11:41 +02:00 |
Florent Kermarrec
|
870638fc50
|
frontend/adaptation: small optimization on LiteDRAMPortUpConverter (still to be refactored)
|
2016-06-12 16:53:44 +02:00 |
Florent Kermarrec
|
edbebfa8a2
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frontend/adaptation: add workaround on LiteDRAMPortUpConverter to increase throughput on reads (to be fixed since only working for our actual usecase)
|
2016-06-10 22:07:53 +02:00 |
Florent Kermarrec
|
66907f1468
|
frontend/adaptation: expose LiteDRAMPortDownConverter, LiteDRAMPortUpConverter
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2016-06-10 19:13:12 +02:00 |
Florent Kermarrec
|
e2b6bda7d0
|
test: add random and autocheck on downconverter_tb and upconverter_tb
|
2016-06-08 17:33:21 +02:00 |
Florent Kermarrec
|
afd2e441eb
|
frontend/adaptation: fix some comments
|
2016-06-08 17:32:08 +02:00 |
Florent Kermarrec
|
25c5a8aaf5
|
frontend/adaptation: adapt fifo depths
|
2016-06-02 22:35:27 +02:00 |
Florent Kermarrec
|
0faee6639d
|
frontend/bist: add random parameter on generator/checker to ease debug
|
2016-06-02 18:35:45 +02:00 |
Florent Kermarrec
|
a5ff573046
|
frontend/bist: rename generator/checker to core
|
2016-06-02 09:27:46 +02:00 |
Florent Kermarrec
|
41364dd0b1
|
frontend/bist: fix cd on LiteDRAMBISTChecker, bist_async_tb now working
|
2016-05-29 16:00:35 +02:00 |
Florent Kermarrec
|
cb69561137
|
phy/model: add we_granularity parameter as simulator bug workaround (to be removed)
|
2016-05-28 13:02:40 +02:00 |
Florent Kermarrec
|
8ee2992e5b
|
frontend/bist: simplify and use incrementing addressing
|
2016-05-26 12:04:41 +02:00 |
Florent Kermarrec
|
2445758eba
|
+x on scripts
|
2016-05-26 11:10:03 +02:00 |
Florent Kermarrec
|
b3a11fb669
|
frontend: move port adaptation modules to adaptation.py and do adaptation manually (and not in get_port)
|
2016-05-26 11:03:55 +02:00 |
Florent Kermarrec
|
3fe3a843e0
|
test: also test reads on downconverter/upconverter
|
2016-05-24 21:40:46 +02:00 |
Florent Kermarrec
|
32a6e25021
|
test: add upconverter_tb and some fixes
|
2016-05-24 21:14:49 +02:00 |
Florent Kermarrec
|
de61cefb58
|
test: add downconverter_tb and some fixes
|
2016-05-24 20:48:26 +02:00 |
Florent Kermarrec
|
777d907da1
|
frontend/crossbar: fill LiteDRAMUpConverter (incomplete and to be tested)
|
2016-05-24 08:49:53 +02:00 |
Florent Kermarrec
|
f70e28beac
|
frontend/crossbar: fill LiteDRAMDownConverter (to be tested)
|
2016-05-24 08:34:14 +02:00 |
Florent Kermarrec
|
b76f7e6e07
|
frontend/crossbar: add skeleton/descroption for port downconverters/upconverters
|
2016-05-24 06:56:58 +02:00 |
Tim 'mithro' Ansell
|
673a5d8317
|
Adding .gitignore file.
|
2016-05-23 19:59:56 +02:00 |
Florent Kermarrec
|
6f10314d43
|
frontend/bist: remove cd parameter (already available with dram_port.cd)
|
2016-05-23 17:37:30 +02:00 |
Florent Kermarrec
|
b258c9a913
|
test: add bist_async_tb and some fixes
|
2016-05-23 17:20:42 +02:00 |
Florent Kermarrec
|
cb42ea510d
|
frontend/bist: LiteDRAMBISTChecker can now be asynchronous
|
2016-05-23 14:26:53 +02:00 |
Florent Kermarrec
|
cb324ea47c
|
frontend/bist: LiteDRAMBISTGenerator can now be asynchronous
|
2016-05-23 14:17:22 +02:00 |
Florent Kermarrec
|
f36c65b66f
|
test: move DRAMMemory model to common
|
2016-05-23 13:30:38 +02:00 |
Florent Kermarrec
|
94d526a78c
|
test/bist_tb: adapt to new interface
|
2016-05-23 13:27:29 +02:00 |
Florent Kermarrec
|
a016a820b5
|
common/LiteDRAMPort: add defaut cd value
|
2016-05-18 15:49:44 +02:00 |
Florent Kermarrec
|
8d066caea9
|
common: use cmd/wdata/rdata stream on LiteDRAMPort
|
2016-05-13 15:46:15 +02:00 |
Florent Kermarrec
|
30bacfeb1b
|
frontend: add LiteDRAMAsyncAdapter for asynchronous ports (need more tests)
|
2016-05-13 15:27:12 +02:00 |
Florent Kermarrec
|
19a0bd59d2
|
frontend/dma: use stream.SyncFIFO
|
2016-05-13 13:35:59 +02:00 |
Florent Kermarrec
|
8b98dd3c8a
|
frontend: simplify wdata/wdata_we on user side (implement the mux in the crossbar)
|
2016-05-12 15:34:39 +02:00 |
Florent Kermarrec
|
9d2c8bf1cf
|
frontend: remove geom/timing parameters from LiteDRAMPort since this prevent providing async or arbitraty length port easily
|
2016-05-09 12:07:06 +02:00 |
Florent Kermarrec
|
d7458a3c34
|
test: remove common
|
2016-05-04 01:16:29 +02:00 |
Florent Kermarrec
|
92c036e72b
|
remove example_designs for now (examples are in LiteX)
|
2016-05-04 01:15:19 +02:00 |
Florent Kermarrec
|
bb214ce895
|
README: remove wip banner and add Features
|
2016-05-04 01:13:00 +02:00 |
Florent Kermarrec
|
68e4b9322c
|
phy/s6ddrphy: fix
|
2016-05-04 01:10:44 +02:00 |
Florent Kermarrec
|
bb67fdba57
|
core/perf: fix
|
2016-05-04 00:26:32 +02:00 |
Florent Kermarrec
|
37c9d6dd46
|
frontend/bist: fix missing AutoCSR
|
2016-05-04 00:26:24 +02:00 |
Florent Kermarrec
|
a40b0f760c
|
test/bist_tb: cleanup and add error check
|
2016-05-03 22:22:11 +02:00 |
Florent Kermarrec
|
836a9d4f00
|
test: removed bank_machine_tb (should be rewritten)
|
2016-05-03 19:25:39 +02:00 |
Florent Kermarrec
|
812d7dd7f0
|
frontend/bist: reword bist, add simulation, seems to work but need more testing
|
2016-05-03 19:24:33 +02:00 |
Florent Kermarrec
|
4c1b97b465
|
core/refresher: remove req/ack signal and use stream
|
2016-05-03 17:45:57 +02:00 |
Florent Kermarrec
|
3d9ea833dd
|
frontend/crossbar: continue cleanup/simplify
|
2016-05-03 17:24:11 +02:00 |
Florent Kermarrec
|
2ef8879661
|
frontend/crossbar: replace rr by arbiter
|
2016-05-03 17:14:03 +02:00 |
Florent Kermarrec
|
2709efa4a7
|
frontend/crossbar: remove controller_selected (no longer needed)
|
2016-05-03 17:11:34 +02:00 |
Florent Kermarrec
|
e712a9d565
|
changes names on cmd_layout and data_layout
|
2016-05-03 17:02:59 +02:00 |