Commit Graph

617 Commits

Author SHA1 Message Date
enjoy-digital 3463e3be49
Merge pull request #131 from antmicro/sync_arty
Sync Arty Board files with main LiteX repository
2020-12-07 21:43:34 +01:00
Robert Winkler 18337cdf25 targets/arty: sync with litex repository
Signed-off-by: Robert Winkler <rwinkler@antmicro.com>
2020-12-07 17:32:40 +01:00
enjoy-digital 0b8a01f929
Merge pull request #130 from antmicro/fix-zybo-clock-pin
zybo_z7: fix clock pin constraint
2020-12-07 17:13:40 +01:00
Alessandro Comodi f66860c201 zybo_z7: fix clock pin constraint
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
2020-12-07 16:46:20 +01:00
enjoy-digital 26d3b57243
Merge pull request #129 from geertu/master
targets/orangecrab: Fix --sdram-device help text
2020-12-04 14:53:48 +01:00
Geert Uytterhoeven 8e5f955e4e targets/orangecrab: Fix --sdram-device help text
Obviously --sdram-device takes the SDRAM device, not the ECP5 FPGA
device.

Fixes: bf3c9dc9bf ("orangecrab: Add sdram selection option")
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2020-12-04 14:34:01 +01:00
Florent Kermarrec fe563baec7 targets/fomu: modification to ValentyUSB no longer required.
Following commits make it generic/portable while still using IOBuffers:
77b9d01058
371526e432
2020-11-27 19:40:45 +01:00
Florent Kermarrec 5a4e28d47d target/usb_acm: switch git clone to litex-hub/valentyusb repo (up to date with LiteX). 2020-11-27 18:53:45 +01:00
enjoy-digital 20903da54a
Merge pull request #128 from trabucayre/redpitaya_support
add support for redpitaya14/16
2020-11-26 08:30:23 +01:00
Gwenhael Goavec-Merou 8d1095224f add support for redpitaya14/16 2020-11-26 06:54:11 +01:00
enjoy-digital b3315bd309
Merge pull request #127 from daveshah1/nexus-toolchain
nexus: Allow selection of toolchain
2020-11-25 19:22:28 +01:00
David Shah 11fa5c34ac nexus: Allow selection of toolchain
Signed-off-by: David Shah <dave@ds0.me>
2020-11-25 09:45:25 +00:00
Florent Kermarrec b9d9af3183 ci: switch from Travis CI to Github Actions. 2020-11-24 14:01:23 +01:00
Florent Kermarrec 159a0c751c targets/colorlight_5a_75x: update instructions and LiteEthPHYRGMII's tx_delay (required with LiteEth fixes). 2020-11-23 12:30:36 +01:00
Florent Kermarrec 03bb929f27 colorlight_5a_75x: add LedChaser. 2020-11-23 10:14:20 +01:00
Florent Kermarrec d18deef10d colorlight_5a_75x: switch prog to FT232 based programmer (ex: JTAG HS2). 2020-11-23 10:13:57 +01:00
enjoy-digital ee50c3e8ae
Merge pull request #124 from antmicro/jboc/mercury-xu5
mercury_xu5: reduce cmd_latency to fix problems with DRAM leveling
2020-11-20 19:37:41 +01:00
Jędrzej Boczar ce38cff41d mercury_xu5: reduce cmd_latency to fix problems with DRAM leveling 2020-11-20 15:31:47 +01:00
enjoy-digital a2f3add24e
Merge pull request #123 from teknoman117/litefury
Support for the RHS Research LiteFury
2020-11-20 08:44:27 +01:00
Nathaniel R. Lewis 389b623fe2 targets/litefury: new target
LiteFury is an Artix-7 development board in the M.2 form factor
for PCIe accelerator development. It's similar to the Aller but
with an xc7a100t rather than an xc7a200t and no TPM module.

https://rhsresearch.com/collections/rhs-public/products/litefury
2020-11-19 21:52:14 -08:00
Florent Kermarrec 49e1c34dfd targets/acorn_cle_215: add SATA. 2020-11-18 19:14:18 +01:00
Florent Kermarrec 778ce53865 targets/xcu1525: add SATA. 2020-11-17 15:27:42 +01:00
Florent Kermarrec 27e19644f4 targets/kcu105: add SATA. 2020-11-16 18:44:18 +01:00
Florent Kermarrec 27f60b2e93 add initial Siglent SDS1104X-E support (Ethernet & DDR3 validated).
Pinout from https://github.com/360nosc0pe project.
2020-11-13 12:20:15 +01:00
Florent Kermarrec d42af3ea19 targets: add --sys-clk-freq support to all targets. 2020-11-12 18:07:28 +01:00
Florent Kermarrec 72afb95329 targets: create platform on BaseSoC for all targets (consitency). 2020-11-12 16:57:31 +01:00
Florent Kermarrec 843e724e3d targets/pcie: simplify using new LiteX's add_pcie method and enable it on all devices supported by LitePCIe. 2020-11-12 16:39:42 +01:00
Florent Kermarrec 9f11bfb0d1 qmtech_ep4ce15: convert name to lowercase, minor cleanup and add to test_targets. 2020-11-12 14:33:45 +01:00
enjoy-digital 31eb74dc2d
Merge pull request #122 from baselsayeh/master
add Qmtech EP4CE15 coreboard support
2020-11-12 14:27:49 +01:00
Florent Kermarrec 0a62cc6992 test/test_targets: update. 2020-11-12 14:26:47 +01:00
Florent Kermarrec 46e8a957fe platforms/zybo_z7: fix default_clk typo. 2020-11-12 14:26:36 +01:00
Florent Kermarrec ac075f18c7 platforms/crosslink_nx_evn/vip: add default_clk. 2020-11-12 14:26:17 +01:00
Florent Kermarrec f3ccd140c2 targets/simple: add try/except on leds. 2020-11-12 14:26:00 +01:00
Basel Sayeh 0fc67ddfdb
update copyright 2020-11-12 15:25:39 +02:00
Florent Kermarrec 7c6df67739 targets: add tinyfpga_bx target (based on icebreaker/fomu targets). 2020-11-12 14:09:25 +01:00
Florent Kermarrec 302e4ffdff targets/simple: simplify (only keep minimal SoC + Leds) and add load argument.
ex of use:
./simple.py litex_boards.platform.ulx3s --build --load
./simple.py litex_boards.platform.trellisboard --build --load
./simple.py litex_boards.platform.arty --build --load
etc...
2020-11-12 13:54:30 +01:00
Florent Kermarrec a4d05522d4 platforms/ice40/ecp5: add toolchain parameter with default to trellis (ECP5) or icestorm (iCE40).
Required to simplify simple.py target and use trellis/icestorm as default toolchain.
2020-11-12 13:33:30 +01:00
Florent Kermarrec 5cf7731f37 targets/netv2: add PCIe. 2020-11-12 12:16:01 +01:00
Florent Kermarrec 7a9f175450 targets/pcie: remove force of csr_data_width to 32 (this is now the default) but just add a check on the pcie block. 2020-11-12 12:08:20 +01:00
Florent Kermarrec 4401fec1e6 targets: remove add_csr("crg") (no longer needed). 2020-11-12 11:54:11 +01:00
Florent Kermarrec bd4e92ad13 targets: cleanup, uniformize build arguments between targets. 2020-11-12 11:46:00 +01:00
Basel Sayeh 1b1ed5ebf1
add Qmtech EP4CE15 coreboard support 2020-11-12 01:56:36 +02:00
Florent Kermarrec 5fbb176c2a targets/crosslink_nx: update NXLRAM import. 2020-11-09 11:05:18 +01:00
Florent Kermarrec afe44e2bd6 targets/crosslink_nx_evn: update NXPLL import. 2020-11-09 10:25:30 +01:00
Florent Kermarrec 39d979a9d3 targets/Ultrascale: add missing AsyncResetSynchronizer import. 2020-11-09 10:25:05 +01:00
enjoy-digital 3fc490dae7
Merge pull request #121 from davidcorrigan714/master
Lattice NX PLL Support
2020-11-09 09:31:31 +01:00
davidcorrigan714 97b64d16a6 Lattice NX PLL Support 2020-11-08 20:34:46 -06:00
Florent Kermarrec 1f52fbaca6 xcu1525: fix last ddram channel numbering. 2020-11-06 10:48:26 +01:00
Florent Kermarrec 2b17dc1b89 target: add rst signal to CRG to allow full reset of the SoC on reboot command. 2020-11-04 11:13:42 +01:00
Florent Kermarrec aa6b9cab4a targets/crosslink_nx_vip: +x. 2020-11-04 09:30:57 +01:00