Florent Kermarrec
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fd1e655700
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targets: cleanup EthernetSoC
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2020-01-16 10:28:09 +01:00 |
|
Florent Kermarrec
|
028d4a78aa
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targets: use default integrated rom/ram size passed with **kwargs from default soc_core_args
|
2020-01-13 15:20:37 +01:00 |
|
Florent Kermarrec
|
babbc676eb
|
targets: cleanup ECP5 CRGs
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2020-01-09 14:24:18 +01:00 |
|
Florent Kermarrec
|
d91458c3e6
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targets/versa_ecp5: fix compilation with diamond
|
2019-12-06 16:16:19 +01:00 |
|
Florent Kermarrec
|
30ea463b41
|
targets: keep attributes are no longer needed since automatically added when applying constraints to signals.
|
2019-12-06 16:01:59 +01:00 |
|
Florent Kermarrec
|
1b1370d086
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official/targets: uniformize, improve presentation
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2019-12-03 09:07:09 +01:00 |
|
Florent Kermarrec
|
1ae26dd499
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targets: use type="io" instead of io_region=True
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2019-10-30 16:35:32 +01:00 |
Gabriel Somlo
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8878c0a84a
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versa_ecp5, trellisboard: add trellis toolchain specific arguments
Sync up with Litex commit #49372852d.
|
2019-10-29 12:32:41 -04:00 |
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Florent Kermarrec
|
785909ac5f
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targets: switch from shadow_base to io_regions
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2019-10-09 11:09:59 +02:00 |
|
Florent Kermarrec
|
48cd1208df
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targets: sync with litex targets
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2019-09-25 14:09:25 +02:00 |
|
Florent Kermarrec
|
ac58d57a83
|
targets: import platforms from litex_boards.platforms
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2019-08-26 09:09:40 +02:00 |
|
Florent Kermarrec
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debafd7c17
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official/partner: update
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2019-07-12 19:19:01 +02:00 |
|
Florent Kermarrec
|
4213c75e48
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init repo with litex official boards
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2019-06-10 17:11:36 +02:00 |