Commit Graph

1148 Commits

Author SHA1 Message Date
Florent Kermarrec 8151bf7ffa targets: Update and simplify SPI-Flash support (Address is now automatically allocated). 2022-01-07 10:34:47 +01:00
Florent Kermarrec a4130556ac gsd_butterstick: Add optional SYZYGY GPIO (--with-syzygy-gpio) to expose the 32 GPIOs on SYZYGY breakout board. 2022-01-06 18:37:42 +01:00
Karol Gugala 4ae7b5e4ff antmicro_datacenter: extend eth reset 2022-01-06 17:40:44 +01:00
Karol Gugala 86b9b1b56c antmicro_datacenter: fix clock pin LOC 2022-01-06 17:38:49 +01:00
Florent Kermarrec 144c0dc27e digilent_zedboard: +x. 2022-01-06 09:38:19 +01:00
Florent Kermarrec 28cdc8b914 spartan_edge_accelerator: Review/Simplify. 2022-01-06 09:37:46 +01:00
Florent Kermarrec 2c6ce12154 spartan_edge_accelerator: Add seeedstudio prefix and seeedsstudio to vendors list. 2022-01-06 09:06:27 +01:00
enjoy-digital 1ee619a455
Merge pull request #317 from primeshp/spartanacc
Spartan Edge Accelerator Board support
2022-01-06 09:03:02 +01:00
Matthew Brooks 6b0bd4da4d
fix(vc707): fix 'dat' typo 2022-01-05 20:02:07 -08:00
Florent Kermarrec db9173ad8b targets/alchitry_mojo: Fix build. 2022-01-05 18:11:53 +01:00
Florent Kermarrec 53dc00eab7 targets/parser: Rely on argparse.ArgumentDefaultsHelpFormatter to provide default in help description.
Also do minor adjustments while doing this.
2022-01-05 17:06:40 +01:00
Florent Kermarrec 9ad1723ac1 efinix_titanium_ti60_f225_dev_kit: Cleanup HyperRAM IOs. 2022-01-04 15:52:42 +01:00
Florent Kermarrec c836b57145 titanium_ti60_f225_dev_kit: Add HyperRAM separator. 2022-01-04 15:18:26 +01:00
Florent Kermarrec 28a6fad705 targets/efinix_titanium_ti60_f225: Defaults to 200MHz clock and increase HyperRam size to 32MB. 2022-01-04 11:25:18 +01:00
Primesh f5ac5200ff
Added Spartan Edge Accelerator board 2022-01-03 17:14:54 -05:00
Primesh 713ae531f6 Add Spartan Edge Accelerator support 2022-01-03 16:31:13 -05:00
enjoy-digital 059563245d
Merge pull request #314 from sergachev/zedboard
LiteX BIOS on Zedboard
2022-01-03 17:59:22 +01:00
Florent Kermarrec c9816f2bc1 snicker_doodle: Add z7-10/z7-20 variants support. 2022-01-03 17:15:27 +01:00
Florent Kermarrec dc61d383e6 snickerdoodle: Rename to krtkl_snicker_doodle and do minor cosmetic changes. 2022-01-03 17:09:17 +01:00
enjoy-digital b48d96c40d
Merge pull request #309 from derekmulcahy/master
Initial release for Snickerdoodle
2022-01-03 16:46:14 +01:00
enjoy-digital fae2cecf93
Merge pull request #315 from hubmartin/master
Fix cannot find board 'littlebee'
2022-01-03 16:09:12 +01:00
enjoy-digital 3dd85d9afb
Merge pull request #313 from fjullien/add_io_to_t120
efinix: add clock pins to t120 bga576 platform
2022-01-03 16:07:54 +01:00
hubmartin 064406e2f6 Merge branch 'master' of github.com:hubmartin/litex-boards 2021-12-27 21:08:13 +01:00
hubmartin b98d76ff39 Fix cannot find board bug 2021-12-27 21:07:16 +01:00
derekmulcahy 2a6282273f
Merge branch 'litex-hub:master' into master 2021-12-24 22:19:33 -05:00
Derek Mulcahy a118a0e499 Replaced Blinky with LedChaser. 2021-12-24 22:14:18 -05:00
Florent Kermarrec b5008a2d5c platforms/radiona_ulx3s: Use specific GPDI mapping for 1.7/2.0 revision.
Data channels 0/2 are swapped between revisions.
2021-12-23 10:39:58 +01:00
Ilia Sergachev bc3c42ab5f zedboard: disable soc uart for all variants (zynq does not need it, for soft cpus there are no pins) 2021-12-22 03:28:13 +01:00
Ilia Sergachev 53ce00b3fd zedboard: add target with bios on arm zynq cpu 2021-12-22 03:14:13 +01:00
Ilia Sergachev 43a1e13b53 zedboard: compress bitstream, derive default clk f 2021-12-22 03:13:30 +01:00
Ilia Sergachev 166451e65e zedboard: remove fake serial 2021-12-22 03:12:48 +01:00
Franck Jullien 379745b039 efinix: add clock pins to t120 bga576 platform 2021-12-21 12:34:19 +01:00
Derek Mulcahy 154cb672da Removed unused ext_freq parameter. 2021-12-20 21:42:21 -05:00
Derek Mulcahy 81404ff185 Improved PS7 support. Configured external clock. 2021-12-20 21:14:18 -05:00
Derek Mulcahy 15ea01197d Added placeholder clk/led/uart. 2021-12-20 21:12:46 -05:00
derekmulcahy d64207f8b6
Merge branch 'litex-hub:master' into master 2021-12-20 17:35:35 -05:00
enjoy-digital 94b4789286
Merge pull request #312 from trabucayre/arty_z7
adding digilent_arty_z7 support
2021-12-20 21:50:41 +01:00
enjoy-digital 8772190177
Merge pull request #311 from tilk/icesugar_pro
Option --with-spi-flash for iCESugar-Pro
2021-12-20 21:49:26 +01:00
Florent Kermarrec 8664b59f23 targets: Fix --bios-flash-offset support and other minor cleanups. 2021-12-20 21:41:12 +01:00
enjoy-digital c6303480cb
Merge pull request #308 from hubmartin/tinyfpga_bx
Fix bios-flash-offset for tinyFPGA
2021-12-20 21:29:37 +01:00
Gwenhael Goavec-Merou bb92bb00a8 adding digilent_arty_z7 support 2021-12-20 18:02:57 +01:00
derekmulcahy 4c76e12932
Merge branch 'litex-hub:master' into master 2021-12-20 10:54:09 -05:00
Marek Materzok 7fb225a162 Option --with-spi-flash for iCESugar-Pro 2021-12-19 15:50:52 +01:00
Franck Jullien f18c1a033c Efinix: ti60: add HyperRAM support 2021-12-17 10:23:10 +01:00
Derek Mulcahy 1c87c391c4 Initial release for Snickerdoodle 2021-12-14 16:00:42 -05:00
hubmartin 84f267e00c Change bios-flash-offset for tinyFPGA 2021-12-14 19:10:03 +01:00
enjoy-digital c2a840f777
Merge pull request #307 from fjullien/titanium_spi
Titanium spi
2021-12-14 08:21:15 +01:00
Franck Jullien 9608cae2ee efinix: Ti60f225 change spi_flash module 2021-12-13 23:01:48 +01:00
Franck Jullien be7dbf3b1b exfinix: efinix_titanium_ti60_f225_dev_kit: fix typo 2021-12-13 22:53:50 +01:00
Florent Kermarrec 179e9090d1 Rename efinix_titanium_ti60_bga225_dev_kit to efinix_titanium_ti60_f225_dev_kit and also exclude it from tested platforms/targets. 2021-12-13 15:54:56 +01:00
enjoy-digital 4a9828c506
Merge pull request #305 from fjullien/efinix_titanium
efinix: add titanium Ti60 dev kit
2021-12-13 15:45:55 +01:00
Franck Jullien e84f32b918 efinix: add titanium Ti60 dev kit 2021-12-13 09:37:14 +01:00
Gwenhael Goavec-Merou 2df10f278f platforms/redpitaya: fix DAC pins 2021-12-12 15:55:31 +01:00
enjoy-digital 35e0026875
Merge pull request #303 from sergachev/master
sipeed_tang_nano_4k: add option to build with Gowin EMCU
2021-12-09 14:30:54 +01:00
Ilia Sergachev 14a8c50e97 sipeed_tang_nano_4k: connect Gowin EMCU UART, undo unnecessary changes 2021-12-09 00:17:48 +01:00
Ilia Sergachev 6274c4c425 sipeed_tang_nano_4k: connect Gowin EMCU UART 2021-12-09 00:12:31 +01:00
Ilia Sergachev 13c83ba532 sipeed_tang_nano_4k: add initial Gowin EMCU support 2021-12-08 23:50:14 +01:00
Ilia Sergachev 4287ab561e sipeed_tang_nano_4k: allow non-vexriscv CPUs 2021-12-08 23:33:49 +01:00
Franck Jullien 338abb4e0c efinix: add bank voltage configuration to platforms 2021-12-08 18:10:22 +01:00
enjoy-digital 9119250276
Merge pull request #300 from tilk/de1_soc
Better support for DE1-SoC
2021-12-08 06:18:25 +01:00
enjoy-digital 2b7587632f
Merge pull request #299 from gregdavill/butterstick-updates
Butterstick updates
2021-12-08 06:16:29 +01:00
Florent Kermarrec 8ad89881c2 fairwaves_xtrx: Add pcie_x2 definitions and switch to it. 2021-12-07 15:27:55 +01:00
Florent Kermarrec df175c5750 efinix_trion_t20_mipi_dev_kit: Add clk26. 2021-12-07 15:27:18 +01:00
Greg Davill 59d487f9fb butterstick: Add pullup on sdcard_cd 2021-12-07 14:32:13 +10:30
Marek Materzok cbeb2a3792 Add LedChaser to DE1-SoC 2021-12-05 20:16:10 +01:00
Marek Materzok 1d5bbb4c7f Fix loading bitstream for DE1-SoC 2021-12-05 20:16:10 +01:00
Marek Materzok 90c9696c73 LED, buttons, GPIOs etc. for DE1-SoC 2021-12-05 20:16:00 +01:00
Greg Davill fd2ec534a7 butterstick: Add extra pins 2021-12-05 20:33:28 +10:30
Greg Davill c8a8e943b5 butterstick: add --sdram-device option
Set 64M16 as default sdram-device.

Related to #298
2021-12-04 17:07:06 +10:30
Greg Davill 61b0dfe63c butterstick: Add additional SYZYGY connectors 2021-12-04 17:02:36 +10:30
Florent Kermarrec bf8b23c19f trenz_tec0117: Update target. 2021-12-02 18:23:11 +01:00
enjoy-digital efa1f46356
Merge pull request #297 from sergachev/master
Fix Sipeed Tang Nano 4k example compilation; adapt Gowin PLL class changes
2021-12-02 09:14:32 +01:00
Ilia Sergachev 666ef9dad3 sipeed_tang_nano_4k: use minimal vexriscv variant to fit into number of BSRAMs 2021-11-29 11:46:32 +01:00
Ilia Sergachev 2fb734a0f2 sipeed_tang_nano*: adapt Gowin PLL changes in litex 2021-11-29 11:45:13 +01:00
Florent Kermarrec b3175e4a9c fairwares_xtrx: Generate Fallback/Operational bitstreams. 2021-11-26 16:20:44 +01:00
Florent Kermarrec 1829693877 fairwaves_xtrx: Integrate ICAP/SPIFlash (for update over PCIe). 2021-11-26 16:18:52 +01:00
Florent Kermarrec 2555fdff91 fairwaves_xtrx: Add SPIFlash, I2C, GPS, I2C, AUX, RF-Switches, RF-IC IOs. 2021-11-26 16:00:07 +01:00
enjoy-digital fe14e16c1b
Merge branch 'master' into tang_primer 2021-11-23 19:04:09 +01:00
Miodrag Milanovic 6954dd25eb Set minimal core, since full does not work for some reason 2021-11-23 15:26:54 +01:00
Miodrag Milanovic b0dcd96964 added comments 2021-11-23 14:58:08 +01:00
Miodrag Milanovic 0b7fabb864 FireAnt board support 2021-11-23 14:43:52 +01:00
Miodrag Milanovic 2cc322e65d Add initial support for Tang Primer board 2021-11-22 19:10:11 +01:00
Florent Kermarrec 70c0dbb185 targets/radiona_ulx3s: Remove SDRAM underflows debug pin. 2021-11-22 11:54:18 +01:00
enjoy-digital b1817af8a8
Merge pull request #294 from antmicro/fix-ddr4-datacenter-platform
platforms: ddr4 datacenter: invert eth clocks
2021-11-21 19:11:13 +01:00
Florent Kermarrec 3e9e9bc425 platforms/sqrl_acorn: Add Multiboot Operational/Fallabck bistreams generation.
To allow recovery in case of PCIe update failure (Write error, power issue or crash).
2021-11-21 19:10:21 +01:00
Florent Kermarrec 60b769b624 efinix_trion_t120_bga576_dev_kit/ethernet: Disable software debug (RX now seems to be working fine). 2021-11-16 18:53:15 +01:00
Florent Kermarrec 996f5b2edd efinix_trion_t120_bga576_dev_kit: Enable target1 port and also connect it to SoC. 2021-11-16 18:12:42 +01:00
Florent Kermarrec 7ce6c4cf79 efinix_trion_t120_bga576_dev_kit: Switch to ctrl_type = "none" (Also seems to work fine, avoid ddr_reset_sequencer dependency). 2021-11-16 17:50:47 +01:00
Florent Kermarrec 99f4f97f00 efinix_trion_t120_bga576_dev_kit: Use new InterfaceWriterBlock/InterfaceWriterXMLBlock and move PLL/DRAM blocks definition to target. 2021-11-16 17:41:26 +01:00
Alessandro Comodi fa26b126df platforms: ddr4 datacenter: invert eth clocks
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
2021-11-16 12:55:50 +01:00
Hans Baier e16fa193fc qmtech 10cl006: remove all options which won't fit into the device. use uartbone as default 2021-11-15 10:23:01 +07:00
Hans Baier 2272962315 qmtech_10cl001: fix wrong sdram clock pin 2021-11-15 09:54:17 +07:00
Florent Kermarrec 138dc1467e quicklogic_quickfeather: Fix build with GPIOIn when cpu-type=None (IRQ not supported). 2021-11-14 09:30:52 +01:00
Florent Kermarrec ed67b91fcc quicklogic_quickfeather: Simplify cpu_type switch between None/EOS-S3. 2021-11-14 09:26:29 +01:00
Florent Kermarrec 2d3422869c quicklogic_quickfeather: Update clocking. 2021-11-14 09:19:19 +01:00
Florent Kermarrec df468fcf85 quicklogic_quickfeather: Avoid add_csr calls (not required). 2021-11-14 08:54:49 +01:00
Florent Kermarrec 06bae58f48 efinix_trion_t120_bga576: Do a bit a of cleanup on LPDDR3 now that working. 2021-11-12 19:43:28 +01:00
Florent Kermarrec 86f6d7e66b efinix_trion_t120_bga576_dev_kit: Remove test command. 2021-11-12 18:06:11 +01:00
Florent Kermarrec 4e03f66fad efinix_trion_t120_bga576_dev_kit: Remove debug, integrate LPDDR3 as done on other targets.
Also lower sys_clk_freq since seems to cause issue with DRAM at 100MHz: Needs to be investigated.
2021-11-12 18:04:30 +01:00
Florent Kermarrec 77fffda9cd efinix_trion_t120_bga576_dev_kit: Switch to UARTBone, Add LiteScope on Pseudo-AXI, fix addressing and do first successful LPDDR3 accesses :) 2021-11-12 16:41:42 +01:00