Commit Graph

134 Commits

Author SHA1 Message Date
enjoy-digital dc1371108d
Merge pull request #52 from antmicro/jboc/mercury-xu5
add Enclustra Mercury XU5 board
2020-03-09 09:11:15 +01:00
Florent Kermarrec 2b1b9684de targets/icebreaker: simplify CRG, just use a 12MHz sys_clk and por_clk for reset. 2020-03-07 18:25:26 +01:00
Florent Kermarrec 9416ddd84a targets/icebreaker: simplify arguments and make it closer to others targets. 2020-03-07 18:13:02 +01:00
Florent Kermarrec 992f7066fa targets/icebreaker: simplify leds. 2020-03-07 18:12:59 +01:00
Florent Kermarrec 682316214c targets/icebreaker: use specific method to set Yosys/Nextpnr settings. Rename argument to nextpnr-xxyy. 2020-03-07 18:12:52 +01:00
Florent Kermarrec f777d4b08c targets/icebreaker: +x 2020-03-05 23:11:35 +01:00
Florent Kermarrec 6f517ad1d6 targets/ecp5: make sure all BaseSoC/EthernetSoc default to trellis. 2020-03-05 10:57:59 +01:00
Jędrzej Boczar d002059e0b add Enclustra Mercury XU5 board 2020-03-05 10:52:32 +01:00
Piotr Esden-Tempski 745c99ba14 icebreaker: Updated to build on newer litex. Disabled bios building. 2020-03-05 00:12:18 -08:00
Piotr Esden-Tempski 3ac9d927a9 targets: icebreaker: Minor style fixes. 2020-03-05 00:12:18 -08:00
Sean Cross 738967176c targets: icebreaker: set the boot address to point to SPI flash
Signed-off-by: Sean Cross <sean@xobs.io>
2020-03-05 00:12:18 -08:00
Sean Cross 093e4913c4 targets: icebreaker: hack to get boot working
Signed-off-by: Sean Cross <sean@xobs.io>
2020-03-05 00:12:18 -08:00
Sean Cross 77b780eb4b targets: icebreaker: switch to single SPI
The Icebreaker doesn't have the QE/ bit set in config, so default to
using single SPI.

Signed-off-by: Sean Cross <sean@xobs.io>
2020-03-05 00:12:18 -08:00
Sean Cross e6dcdc31ed targets: icebreaker: fix cpu and add spi flash
Signed-off-by: Sean Cross <sean@xobs.io>
2020-03-05 00:12:18 -08:00
Sean Cross 0185095782 targets: icebreaker: fix argument parsing for cpu
Signed-off-by: Sean Cross <sean@xobs.io>
2020-03-05 00:12:18 -08:00
Sean Cross f0dd31f6c8 target: targets: add crg and begin getting it working
Signed-off-by: Sean Cross <sean@xobs.io>
2020-03-05 00:12:18 -08:00
Piotr Esden-Tempski ce9b67e2ee Added icebreaker platform and target.
Target is heavily based on Fomu.
2020-03-05 00:12:18 -08:00
Florent Kermarrec be5ed35871 targets: default to trellis toolchain on all ECP5 targets (now able to build all supported targets). 2020-02-28 09:46:54 +01:00
Florent Kermarrec b44885d222 vc707: fix copyrights (Michael Betz is the initial author) 2020-02-28 08:39:52 +01:00
Florent Kermarrec b89af28a05 targets/kc705: use DDRPHY_CMD_DELAY to center write leveling. 2020-02-27 12:58:52 +01:00
Florent Kermarrec d8de4fbdfb platforms/targets: keep in sync with LiteX 2020-02-27 11:06:53 +01:00
Florent Kermarrec d87b8b3c66 zcu104: add separate ddram_32/64 definitions and use ddram_32 for now.
Ease switching between ddram_32 and ddram_64.
2020-02-27 10:05:17 +01:00
Florent Kermarrec 8ecfb13f3c zcu104: add copyrights 2020-02-27 09:57:26 +01:00
Piotr Binkowski 608541d5b8 add ZCU104 board 2020-02-26 13:53:21 +01:00
Florent Kermarrec 4a84e9b08a targets/colorlight_5a_75b: add instruction to build/load and use bitstream with wishbone-tool 2020-02-25 12:47:08 +01:00
Florent Kermarrec f279fe9d33 vc707: cleanup platform/targets, remove Ethernet support (no Ethernet pads defined) 2020-02-25 10:35:18 +01:00
Florent Kermarrec 3581df5af6 vc707: cleanup platform/targets, remove Ethernet support (SGMII is not currently supported) 2020-02-25 09:41:53 +01:00
Florent Kermarrec 88a1f80db1 vc707/vcu118: use proper copyrights 2020-02-25 09:03:52 +01:00
Fei Gao 373e74f435 add new board files for VC707 and VCU118, only specified limited ports for VCU118, including clock, reset and DDR4 2020-02-24 14:20:47 -05:00
Sean Cross f72e7bd314
Merge pull request #41 from lromor/fix-wrong-import
Changed wrong imports for fomu board.
2020-02-12 18:48:13 +07:00
Leonardo Romor ec30cc05c3
Changed wrong imports for fomu board. 2020-02-12 12:40:07 +01:00
Florent Kermarrec c94360c2e0 targets: avoid direct use of mem_decoder. 2020-02-11 21:59:42 +01:00
Florent Kermarrec 4edf196911 targets/EthernetSoC: be sure memory region is added before adding Wishbone Slave (required by new SoC) 2020-02-11 17:45:35 +01:00
Florent Kermarrec 8211aca2e8 Avoid Official/Partner/Community differentiation: use same directory for all platforms/targets.
We initially wanted to provide different level of support for the platforms/targets, mainly
to avoid too much maintenance and let each contributor update its contributed platforms and
targets, but it's easier to update all platforms/targets all-together when LiteX evolves or
changes (and that's what has been done on litex-boards since the creation of the repository).
So let just simplify things and avoid this differentiation.
2020-02-03 09:36:30 +01:00