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44 commits

Author SHA1 Message Date
Florent Kermarrec
d05d170b75 soc/integration/cpu_interface: do not generate constant access functions when with_access_functions is set to False 2017-07-19 12:18:35 +02:00
Florent Kermarrec
bdea4152e3 soc/core/uart: add UartStub to enable fast simulation with cpu 2017-07-06 19:19:10 +02:00
Florent Kermarrec
bedd428d9d soc/integration/builder: remove error when compile_software=False and integrated ROM: when using compile_software=False user knows what he's doing. 2017-04-26 13:49:16 +02:00
Florent Kermarrec
c0800d25a6 soc/integration/builder.py: don't take care of ROM when compile_software is forced to False 2017-04-24 19:12:30 +02:00
Tim 'mithro' Ansell
4ee7019852 soc_core: Add CPU_RESET_ADDR as a constant. 
So we can do a "soft reset" by jumping to this address.
 2017-03-12 22:49:36 +11:00
Tim 'mithro' Ansell
36bb0f4f3a Allow using gcc for or1k. 
* Using CLANG can set by using CLANG=1 or CLANG=0 in the environment.
 * or1k continues to default to CLANG if environment is not net.
 2017-03-05 19:01:03 +11:00
Florent Kermarrec
de336a86e5 soc/integration/soc_core: use cpu_reset_address = self.mem_map["rom"] when using integrated_rom 2017-01-30 14:10:57 +01:00
Tim 'mithro' Ansell
bd0eb48357 Fixing missing csr_constant/config support. 
Missed as part of misoc merge at ff31959aea.
 2017-01-14 19:24:04 +11:00
Tim 'mithro' Ansell
9c0e978556 Fixing accidental revert in merge commit. 2017-01-14 00:13:53 +11:00
Florent Kermarrec
ff31959aea merge most of misoc 54e1ef82 and migen e93d0601 changes 2017-01-13 03:55:00 +01:00
enjoy-digital
ffc342f49c Merge pull request #11 from mithro/file-dont-change 
Only require rebuild on actual changes
 2016-12-17 14:43:34 +01:00
Tim 'mithro' Ansell
722edfe9e8 Provide csr_data_width via the constants. 2016-12-17 14:14:53 +01:00
Tim 'mithro' Ansell
4522157ddd Use write_to_file helper. 2016-12-15 19:51:36 +01:00
Tim 'mithro' Ansell
9d716def9d Make the csv directory if it doesn't exist. 2016-12-15 17:19:51 +01:00
Florent Kermarrec
55c9c653e0 adapt to litedram changes 2016-05-04 00:59:02 +02:00
Florent Kermarrec
7a7b9420e6 soc/integration/soc_dram: sync with litedram 2016-05-03 19:44:33 +02:00
Florent Kermarrec
8c7332e75e soc/integration/soc_sdram: use new LiteDRAM names 2016-04-29 17:40:55 +02:00
Florent Kermarrec
dc52d33fba soc_sdram: remove minicon support (we will make lasmicon more configurable to reduce ressource usage) 2016-04-29 16:24:24 +02:00
Florent Kermarrec
66362b1280 move sdram code to litedram (https://github.com/enjoy-digital/litedram) 2016-04-29 07:45:15 +02:00
Florent Kermarrec
80d673e502 soc/integration/soc_sdram: always generate L2_SIZE constant 2016-04-27 12:34:18 +02:00
Florent Kermarrec
1b9ab2f1fc soc/integration/cpu_interface: fix clang detection 2016-04-19 08:06:56 +02:00
Tim 'mithro' Ansell
e7f3c585b7 Allow using gcc for or1k. 
* Using CLANG can set by using CLANG=1 or CLANG=0 in the environment.
 * or1k continues to default to CLANG if environment is not net.
 2016-04-19 14:03:24 +10:00
Florent Kermarrec
6e0045e6be soc/integration/soc_sdram: allow passing controller settings in register_sdram 2016-04-12 20:16:47 +02:00
Florent Kermarrec
17f6cb1f17 initial RISC-V support (with picorv32), still some software to do (manage IRQ, L2 cache flush) 2016-04-01 00:09:17 +02:00
Florent Kermarrec
a016ededa0 soc/integration/builder: remove use of symlinks (simply use make -C dst_dir -f src_dir/Makefile, thanks robert) 2016-03-04 20:56:05 +01:00
Florent Kermarrec
8ee3874088 soc/integration/soc_core: instanciate wishbone/csr/interrupts only if we have at least a wishbone master 2016-02-18 00:11:25 +01:00
Florent Kermarrec
002508a69a soc/integration: return vns with soc and builder 2016-01-14 17:15:39 +01:00
Florent Kermarrec
0498a31818 some cleanup 
- remove Sink/Source connect specialization.
- remove use of Record.connect
- use sink/source on Buffer
 2015-12-27 13:09:58 +01:00
Florent Kermarrec
4fed1cc7a7 soc/integration/builder: move csr_csv generation outside of generate include 
we mostly use csr_csv for designs without CPU
 2015-12-03 15:16:22 +01:00
Florent Kermarrec
b7a1888a36 gen/fhdl/verilog: add regular comb parameter to allow implementation of simulation code (for icarus) 
We will remove that when we will be using new migen simulator
 2015-12-02 14:16:23 +01:00
Florent Kermarrec
c24727ab4c soc/integration: allow using builder with soc.cpu_type == None 2015-11-26 17:44:50 +01:00
Florent Kermarrec
254504e73f soc/integration/builder: export constants and memory_regions with csr_csv 2015-11-23 19:12:58 +01:00
Florent Kermarrec
7ed2576ce1 soc/integration/cpu_interface: add bases, constants and memories output to csv files 2015-11-15 00:04:44 +01:00
Florent Kermarrec
3a2e6117f4 soc/interconnect/stream: add Cast and others small fixes 2015-11-14 12:17:09 +01:00
Florent Kermarrec
041483dbe1 soc/integration/builder: only copy Makefiles when not using symlinks 2015-11-14 03:36:46 +01:00
Florent Kermarrec
cf4c7da2e7 fix soc/integration/soc_core.py 2015-11-14 02:44:12 +01:00
Florent Kermarrec
fc3ffe87ac for now use our fork of migen (to be able to simulate our designs) 2015-11-13 18:31:46 +01:00
Florent Kermarrec
194e6137ae soc/integration/soc_core: add support for SoCs without CPU 2015-11-12 00:50:23 +01:00
Florent Kermarrec
352cb91688 soc/integration/builder: add use_symlinks parameter and desactivate symlinks by default 
On windows machines, console need to be run as Administrator to create symlinks which is bit painful.
 2015-11-11 17:37:28 +01:00
Florent Kermarrec
619cd8e695 avoid forking migen, we will add custom modules in litex/gen but will use upstream migen for common modules 2015-11-11 12:10:55 +01:00
Florent Kermarrec
3f43a49382 soc: merge with misoc 3fcc4f116c3292020cb811d179e45ae45990101b 
changes:
-software/bios: remove dataflow
-cores/identifier: replace with user-defined string
-interconnect/CSRBankArray: support read-only mappings
-targets: Added Numato Mimas V2 target
-Our libunwind changes were merged upstream.
-wishbone: update TODO
-replace Counter in Converters
-Fix CSRBankArray
-flterm: properly exit on ^C.
 2015-11-10 16:51:51 +01:00
Florent Kermarrec
6764c06b62 soc/sofware: remove libdyld 2015-11-10 12:21:23 +01:00
Florent Kermarrec
f72e172ac3 soc/software: remove libunwind 2015-11-10 12:16:34 +01:00
Florent Kermarrec
6a0f85dc42 litex: reorganize things, first work working version 2015-11-07 17:48:55 +01:00