Sebastien Bourdeauducq
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0ec6a7eb4e
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genlib/record: match_by_position -> connect_flat
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2013-05-11 11:48:21 +02:00 |
Sebastien Bourdeauducq
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955a9733c8
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Revert "genlib/record/connect: add match_by_position"
This reverts commit df1ed32765 .
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2013-05-10 17:41:51 +02:00 |
Sebastien Bourdeauducq
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c82b53f1cd
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bank/description/AutoCSR: add autocsr_exclude
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2013-05-08 20:58:57 +02:00 |
Sebastien Bourdeauducq
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10212e85e7
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dma_asmi: cleanup
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2013-05-08 18:58:50 +02:00 |
Sebastien Bourdeauducq
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b9b6df6f29
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bank/eventmanager: refactor, rename EventSourceLevel -> EventSourceProcess, add fully externally controlled event source
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2013-05-08 18:12:26 +02:00 |
Sebastien Bourdeauducq
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7a74dae461
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actorlib/spi: add DMAWriteController
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2013-05-04 17:38:54 +02:00 |
Sebastien Bourdeauducq
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fd089b146f
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actorlib/dma_asmi/OOOWriter: fix tag offset
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2013-05-04 17:38:17 +02:00 |
Sebastien Bourdeauducq
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12deaa91d8
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flow/network/DataFlowGraph: add_buffered_connection
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2013-05-02 13:25:30 +02:00 |
Sebastien Bourdeauducq
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b5b29f6d5d
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bank/description/CSRStorage: set reset property of storage for use in test benches
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2013-05-02 11:49:23 +02:00 |
Sebastien Bourdeauducq
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8ffa273719
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flow/network: better determination of plumbing layout
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2013-05-01 22:13:26 +02:00 |
Sebastien Bourdeauducq
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471393d0f9
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actorlib/dma_asmi: drive dat_wm
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2013-05-01 21:52:26 +02:00 |
Sebastien Bourdeauducq
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c8810a016f
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actorlib/spi: add DMA read controller
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2013-04-30 18:55:01 +02:00 |
Sebastien Bourdeauducq
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c70c71502e
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actorlib/spi/SingleGenerator: use CSR alignment bits
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2013-04-30 18:54:47 +02:00 |
Sebastien Bourdeauducq
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dc0304a87b
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bank/description/CSRStorage: support alignment bits
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2013-04-30 18:53:40 +02:00 |
Sebastien Bourdeauducq
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51f1ace061
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flow/network/CompositeActor: expose unconnected endpoints
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2013-04-30 18:53:02 +02:00 |
Sebastien Bourdeauducq
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4f13c5b74d
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flow/network/DataFlowGraph: add add_pipeline
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2013-04-30 15:49:51 +02:00 |
Sebastien Bourdeauducq
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fb83794ef4
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actorlib/spi/Collector: cleanup, new APIs
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2013-04-28 18:32:46 +02:00 |
Sebastien Bourdeauducq
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746e452838
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actorlib/dma_asmi: support for writes
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2013-04-28 18:06:36 +02:00 |
Sebastien Bourdeauducq
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e97edd7253
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genlib/fifo: disable retiming on Gray counter outputs
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2013-04-25 14:57:07 +02:00 |
Sebastien Bourdeauducq
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156ef43ace
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genlib/cdc: add NoRetiming
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2013-04-25 14:56:45 +02:00 |
Sebastien Bourdeauducq
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b862b070d6
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fhdl/verilog: recursive Special lowering
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2013-04-25 14:56:26 +02:00 |
Sebastien Bourdeauducq
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67c3119249
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genlib/fifo: add asynchronous FIFO
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2013-04-25 13:30:37 +02:00 |
Sebastien Bourdeauducq
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fee228a09f
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fhdl/specials/memory: do not write address register for async reads
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2013-04-25 13:30:05 +02:00 |
Sebastien Bourdeauducq
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6c08cd67aa
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graycounter: expose binary output
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2013-04-25 13:11:15 +02:00 |
Sebastien Bourdeauducq
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0f9df2d732
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genlib: add Gray counter
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2013-04-24 19:13:36 +02:00 |
Florent Kermarrec
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f599fe4ade
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Support for resetless clock domains
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2013-04-23 11:54:05 +02:00 |
Sebastien Bourdeauducq
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8e11fcf1d0
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bus/csr/SRAM: fix Module conversion errors
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2013-04-14 13:55:04 +02:00 |
Sebastien Bourdeauducq
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ea63389823
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fhdl: support len() on all values
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2013-04-14 13:50:26 +02:00 |
Sebastien Bourdeauducq
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75d33a0c05
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fhdl/verilog/_printinit: initialize undriven Special inputs (bug reported by Florent Kermarrec)
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2013-04-11 18:55:49 +02:00 |
Sebastien Bourdeauducq
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72ef4b9683
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ioo+pytholite: use new Module API
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2013-04-10 23:42:46 +02:00 |
Sebastien Bourdeauducq
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4c9018ea17
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fhdl/visit: add TransformModule
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2013-04-10 23:42:14 +02:00 |
Sebastien Bourdeauducq
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746acdacd1
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ioo: move to genlib
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2013-04-10 22:28:53 +02:00 |
Sebastien Bourdeauducq
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1cc4c8ee9f
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uio: remove Trampoline (Python 3.3 provides generator delegation instead)
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2013-04-10 22:15:28 +02:00 |
Sebastien Bourdeauducq
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6ce856290a
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flow: match record fields by position
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2013-04-10 21:33:56 +02:00 |
Sebastien Bourdeauducq
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df1ed32765
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genlib/record/connect: add match_by_position
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2013-04-10 21:33:45 +02:00 |
Sebastien Bourdeauducq
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692794a21f
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flow: use Module and new Record APIs
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2013-04-10 19:12:42 +02:00 |
Sebastien Bourdeauducq
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20bdd424c8
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flow: adapt to new Record API
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2013-04-01 22:15:23 +02:00 |
Sebastien Bourdeauducq
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29b468529f
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bus: replace simple bus module with new bidirectional Record
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2013-04-01 21:54:21 +02:00 |
Sebastien Bourdeauducq
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6a3c413717
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New bidirectional-capable Record API
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2013-04-01 21:53:33 +02:00 |
Sebastien Bourdeauducq
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c4f4143591
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New CSR API
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2013-03-30 17:28:41 +01:00 |
Sebastien Bourdeauducq
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633e5e6747
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fhdl/module/finalize: pass additional args to do_finalize
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2013-03-30 11:29:46 +01:00 |
Sebastien Bourdeauducq
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574becc1fc
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fhdl/specials: clean up clock domain handling
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2013-03-26 11:58:34 +01:00 |
Sebastien Bourdeauducq
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77a0f0a3bb
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actorlib/structuring/Cast: support inversion
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2013-03-25 15:54:09 +01:00 |
Sebastien Bourdeauducq
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c4c4765a4e
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bank/csrgen/BankArray: retain name information
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2013-03-25 14:44:15 +01:00 |
Sebastien Bourdeauducq
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53edc3557e
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bank/description/Register: add get_size
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2013-03-25 14:43:44 +01:00 |
Sebastien Bourdeauducq
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3da98ea04d
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genlib/record: use getattr instead of __dict__
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2013-03-24 00:51:01 +01:00 |
Sebastien Bourdeauducq
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1897b74f97
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genlib/record: add eq
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2013-03-24 00:50:33 +01:00 |
Sebastien Bourdeauducq
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9d7c679b8c
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genlib/fifo: simple synchronous FIFO
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2013-03-22 18:18:38 +01:00 |
Sebastien Bourdeauducq
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ca431fc7c2
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fhdl/module: support clock domain remapping of submodules
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2013-03-22 18:17:54 +01:00 |
Sebastien Bourdeauducq
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a94bf3b2c5
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genlib/cdc/MultiReg: output clock domain defaults to sys
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2013-03-21 10:40:02 +01:00 |