Florent Kermarrec
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17e5249be0
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global: pep8 (replace tabs with spaces)
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2015-04-13 20:07:07 +02:00 |
Sebastien Bourdeauducq
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ae770c0f8c
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bank: support direct mapping of CSRs on Wishbone
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2014-11-30 22:28:39 +08:00 |
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Florent Kermarrec
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dbaeaf7833
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remove trailing whitespaces
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2014-10-17 17:08:46 +08:00 |
Sebastien Bourdeauducq
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f658802ff8
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replace use of __dict__ with dir()/xdir()
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2013-11-02 16:03:47 +01:00 |
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Sebastien Bourdeauducq
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0e195da3c0
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bank/csrgen: add get_offset function to pre-calculate register addresses
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2013-08-02 23:05:54 +02:00 |
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Sebastien Bourdeauducq
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246b860a85
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csr: new data width API
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2013-07-28 16:33:36 +02:00 |
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Sebastien Bourdeauducq
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70ffe86356
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New migen.fhdl.std to simplify imports + len->flen
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2013-05-22 17:11:09 +02:00 |
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Sebastien Bourdeauducq
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c4f4143591
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New CSR API
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2013-03-30 17:28:41 +01:00 |
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Sebastien Bourdeauducq
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c4c4765a4e
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bank/csrgen/BankArray: retain name information
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2013-03-25 14:44:15 +01:00 |
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Sebastien Bourdeauducq
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fc883198ae
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bank/csrgen/BankArray: create banks in sorted order
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2013-03-13 23:07:44 +01:00 |
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Sebastien Bourdeauducq
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68fe4c269c
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bank/csrgen: BankArray
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2013-03-10 00:45:16 +01:00 |
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Sebastien Bourdeauducq
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62187aa23d
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migen/bank: do not create interface in default param
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2012-12-06 17:28:28 +01:00 |
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Sebastien Bourdeauducq
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e89c66bf14
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bank/csrgen: interface -> bus
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2012-12-06 17:15:34 +01:00 |
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Sebastien Bourdeauducq
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6eebfce44a
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Refactor Case
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2012-11-29 01:11:15 +01:00 |
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Sebastien Bourdeauducq
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fee22a4631
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Remove Constant
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2012-11-28 23:18:43 +01:00 |
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Sebastien Bourdeauducq
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85081793cf
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bank: remove RE signal for field registers
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2012-10-09 19:07:53 +02:00 |
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Sebastien Bourdeauducq
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e410973352
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bank: support for atomic writes
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2012-10-08 18:43:18 +02:00 |
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Sebastien Bourdeauducq
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4164fb4ac9
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bus/csr: configurable data width
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2012-08-26 21:19:34 +02:00 |
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Sebastien Bourdeauducq
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b9c533be51
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bank/csrgen: allow specifying existing CSR interface
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2012-04-06 14:59:09 +02:00 |
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Sebastien Bourdeauducq
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d8d4e81b6e
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bank/csrgen: fix RE generation
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2012-02-18 18:56:18 +01:00 |
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Sebastien Bourdeauducq
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55a265d967
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bank: add RE signal for registers made of fields
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2012-02-17 23:52:06 +01:00 |
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Sebastien Bourdeauducq
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ef7aea0f31
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bank: omit device write register when access_bus==READ_ONLY and access_dev==WRITE_ONLY
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2012-02-15 18:23:31 +01:00 |
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Sebastien Bourdeauducq
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91e279ee04
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bank/csrgen: use new bus API
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2012-02-15 16:42:17 +01:00 |
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Sebastien Bourdeauducq
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8a61d9d121
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bus/csr: Rename a->adr d->dat to be consistent with the other buses
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2012-02-13 21:46:39 +01:00 |
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Sebastien Bourdeauducq
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3a2a0c4dd8
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bank: support registers larger than the bus word width
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2012-02-06 16:15:27 +01:00 |
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Sebastien Bourdeauducq
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f3ddfffc47
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bank: refactoring
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2012-02-06 13:55:50 +01:00 |
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Sebastien Bourdeauducq
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1a86f26a66
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bank/csrgen: use enumerate
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2012-02-06 11:18:30 +01:00 |
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Sebastien Bourdeauducq
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107f03fd4b
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Remove uses of declare_signal
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2011-12-18 21:47:48 +01:00 |
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Sebastien Bourdeauducq
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135a2eb868
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bank: support raw registers
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2011-12-18 00:28:04 +01:00 |
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Sebastien Bourdeauducq
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1a845d4553
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32-device, 8-bit CSR bus
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2011-12-17 15:54:49 +01:00 |
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Sebastien Bourdeauducq
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c7b9dfc203
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fhdl: simpler syntax
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2011-12-16 21:30:14 +01:00 |
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Sebastien Bourdeauducq
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39b7190334
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Pay a bit more attention to PEP8
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2011-12-16 16:02:55 +01:00 |
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Sebastien Bourdeauducq
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7582b76406
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bank: fix csrgen address decoder
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2011-12-11 20:15:30 +01:00 |
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Sebastien Bourdeauducq
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ec51f09c98
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Case support + register bank generator
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2011-12-05 17:43:56 +01:00 |