Sebastien Bourdeauducq
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213cb43ae5
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Keep only basic SoC designs in MiSoC
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2014-08-03 12:30:15 +08:00 |
Florent Kermarrec
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cd51e78f54
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storage: use SyncFIFOBuffered to implement fifo in block ram
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2014-08-02 19:12:03 +02:00 |
Florent Kermarrec
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47a85cc1ad
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use new MiSoC fifo (no flush signal)
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2014-08-01 10:36:15 +02:00 |
Sebastien Bourdeauducq
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9395214d75
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remove stale programmer.py
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2014-08-01 12:34:38 +08:00 |
Florent Kermarrec
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62c9043d07
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move programmer to mibuild
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2014-08-01 08:03:53 +08:00 |
Florent Kermarrec
|
25b3aff6f1
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sdramphy: add init sequence for DDR3
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2014-07-31 10:29:32 +08:00 |
Yann Sionneau
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32171da46d
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Better UART baudrate generator, and testbench
This enables high speed (tested to 4Mbps) operation.
|
2014-07-31 10:24:52 +08:00 |
Sebastien Bourdeauducq
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2cb7d73870
|
mor1kx: sync
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2014-07-28 21:36:00 -06:00 |
Sebastien Bourdeauducq
|
8349543732
|
style
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2014-07-05 18:56:20 +02:00 |
Sebastien Bourdeauducq
|
2bb821c571
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crt-or1k: trim useless exception vectors
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2014-07-05 18:53:23 +02:00 |
Sebastien Bourdeauducq
|
9a64309fcd
|
Merge branch 'master' of github.com:m-labs/misoc
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2014-07-04 10:29:53 +02:00 |
Sebastien Bourdeauducq
|
6462ee7fe1
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Upgrade mor1kx. This fixes the UART bug that was due to IRQ 0 and 1 being non-maskable.
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2014-07-04 10:29:42 +02:00 |
Florent Kermarrec
|
d4833cb3dc
|
cpuif: remove limitations on csr data_width
|
2014-06-28 17:39:55 +02:00 |
Florent Kermarrec
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a0df5baa55
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host: add support for various csr_data width (8 & 32 tested, but should work with others)
|
2014-06-26 13:22:21 +02:00 |
Florent Kermarrec
|
0f9bc5ad6e
|
fix bit inversion on CSV/PY exports
|
2014-06-21 19:06:47 +02:00 |
Florent Kermarrec
|
074a12b444
|
create dump class and specific export functions, add python dictionnary export
|
2014-06-19 13:24:47 +02:00 |
Florent Kermarrec
|
a737358919
|
host: split read/export and add csv export
|
2014-06-17 11:25:10 +02:00 |
Sebastien Bourdeauducq
|
e5ca0c5ed5
|
make.py: add platform-option
|
2014-06-07 13:43:23 +02:00 |
Florent Kermarrec
|
8719206a3a
|
uart2wishbone: add default baudrate
|
2014-06-05 15:13:20 +02:00 |
Sebastien Bourdeauducq
|
4c2a2090b1
|
libbase: remove crt during make clean
|
2014-06-01 23:17:43 +02:00 |
Sebastien Bourdeauducq
|
ac97815619
|
targets/simple: pass kwargs
|
2014-05-24 11:29:03 +02:00 |
Sebastien Bourdeauducq
|
b26ac465bd
|
crt0: remove macadress for or1k as well
|
2014-05-24 10:43:50 +02:00 |
Robert Jordens
|
6deeca064f
|
bios/crt0.S: remove unused macaddr, add syscall handler stub
|
2014-05-24 10:41:54 +02:00 |
Robert Jordens
|
81ed92d3b9
|
spiflash: redundant slice
|
2014-05-24 10:39:07 +02:00 |
Robert Jordens
|
d3b96a0a33
|
programmer: make xc3sprog verbose
|
2014-05-24 10:39:02 +02:00 |
Robert Jordens
|
ed902bfcdf
|
crt: add umoddi3
|
2014-05-24 10:38:55 +02:00 |
Florent Kermarrec
|
b94cba2d4b
|
mila: add input pipe to ease timing
|
2014-05-24 09:23:16 +02:00 |
Sebastien Bourdeauducq
|
dc2024f54d
|
bios: remove references to 'DDR' SDRAM, as we also support SDR SDRAM
|
2014-05-23 21:31:26 +02:00 |
Sebastien Bourdeauducq
|
e9b49ebb44
|
Use SDRAM on the Papilio Pro
Based on code by Robert Jordens
|
2014-05-23 21:26:09 +02:00 |
Florent Kermarrec
|
31e142fd88
|
drivers: clean up / fixes
|
2014-05-22 18:33:28 +02:00 |
Florent Kermarrec
|
9a059336bf
|
storage: simplify run length encoder...
|
2014-05-22 18:13:27 +02:00 |
Florent Kermarrec
|
0bc1cd6f77
|
fix uart selection when opening wishbone
|
2014-05-22 16:11:32 +02:00 |
Florent Kermarrec
|
1dcbb077fd
|
make.py: init bios memory in build-bitstream action otherwise it is not possible to run clean or build-csr-csv or build-headers without build-bios
|
2014-05-21 21:16:06 +02:00 |
Florent Kermarrec
|
f4c0648289
|
gensdrphy: fix dm generation
|
2014-05-21 21:16:06 +02:00 |
Florent Kermarrec
|
1a07116ab1
|
change export format and simplify usage
|
2014-05-20 13:16:24 +02:00 |
Florent Kermarrec
|
ba0382ad92
|
move some functions in drivers and export layout in csv
|
2014-05-20 11:36:10 +02:00 |
Florent Kermarrec
|
2312127c1f
|
simplify and clean up
|
2014-05-20 09:56:35 +02:00 |
Florent Kermarrec
|
54339a6d5b
|
gensdrphy: fix memtype and change phase shift in comments.
|
2014-05-16 16:52:24 +02:00 |
Sebastien Bourdeauducq
|
6298624f98
|
sdramphy: remove fixed parameters
|
2014-05-14 16:08:40 +02:00 |
Sebastien Bourdeauducq
|
398608e997
|
bios: fill delay slot in boot_helper
|
2014-05-14 16:08:25 +02:00 |
Sebastien Bourdeauducq
|
94b2295a96
|
targets/mlabs_video: pass with_memtest as kwargs
|
2014-05-14 15:02:07 +02:00 |
Sebastien Bourdeauducq
|
13e74b8b4f
|
software: factorize exception_handler
|
2014-05-14 15:01:38 +02:00 |
Sebastien Bourdeauducq
|
edf567a0cd
|
bios: fix boot for or1k
|
2014-05-14 15:01:02 +02:00 |
Sebastien Bourdeauducq
|
1c08aeb21c
|
Initial mor1kx (OpenRISC) support
Based on milkymist-ng-mor1kx by Stefan Kristiansson
|
2014-05-14 10:24:56 +02:00 |
Florent Kermarrec
|
6f47a928b1
|
storage: simplify recorder...
|
2014-05-13 21:30:32 +02:00 |
Florent Kermarrec
|
c7e100f93b
|
sim: fix tb_trigger_csr
|
2014-05-13 17:45:15 +02:00 |
Florent Kermarrec
|
11be0a27fc
|
fix minimac bases addresses
|
2014-05-12 19:19:34 +02:00 |
Florent Kermarrec
|
774464155a
|
gensdrphy: clean up and implement data mask
|
2014-05-01 16:17:50 +02:00 |
Florent Kermarrec
|
87a78bc059
|
make.py: add missing --csr_csv argument
|
2014-05-01 13:31:57 +02:00 |
Robert Jordens
|
3ab9f234d0
|
gensdrphy: use 'dm' not 'dqm' (follow s6ddrphy and majority of platforms)
|
2014-04-25 10:38:57 +02:00 |