Commit graph

3234 commits

Author SHA1 Message Date
Sebastien Bourdeauducq
b43495aab1 build/xilinx: minor cleanup 2015-09-12 16:48:25 +08:00
Sebastien Bourdeauducq
047d1f48b5 test/support,signed,sort: use new simulator 2015-09-12 16:28:21 +08:00
Sebastien Bourdeauducq
8ee361ffe2 sim: refactor comb commit 2015-09-12 16:27:59 +08:00
Sebastien Bourdeauducq
5fa7f7414f sim: support eval of nested lists 2015-09-12 16:01:53 +08:00
Sebastien Bourdeauducq
9556c335ea genlib/sort: remove unneeded import 2015-09-12 15:21:42 +08:00
Sebastien Bourdeauducq
308c5d7a78 examples/graycounter: use new simulator 2015-09-12 15:14:21 +08:00
Sebastien Bourdeauducq
fa6d96bb9a test/examples: do not attempt to run deleted examples 2015-09-12 15:13:45 +08:00
Sebastien Bourdeauducq
7bd72a16df sim: support clock domains without sync 2015-09-12 15:12:57 +08:00
Sebastien Bourdeauducq
fd986210f8 simulator: support generators 2015-09-10 21:44:14 -07:00
Sebastien Bourdeauducq
10d89d81f4 new simulator: basic execution 2015-09-10 20:33:45 -07:00
Sebastien Bourdeauducq
49ef182305 fhdl/tools: add input lister 2015-09-10 20:33:10 -07:00
Sebastien Bourdeauducq
f9849fb8be style 2015-09-10 20:32:47 -07:00
Sebastien Bourdeauducq
714ae43ab8 fhdl: remove features new simulator won't use 2015-09-10 18:29:57 -07:00
Sebastien Bourdeauducq
91ab3f0d01 remove genlib.misc.optree (use reduce instead) 2015-09-10 13:56:56 -07:00
Florent Kermarrec
31956de790 dvisampler/edid: fix sda sampling, needs to be similar to scl.
Video sources with high scl frequency were not able to access EDID information through I2C.
I2C start was not detected correctly and was randomly reseting the fsm during transfers.(seen with litescope)
2015-09-10 20:51:10 +02:00
Yves Delley
1dcd2ac1c0 fixed bug in value_bits_sign of mul operatiors 2015-09-10 10:53:26 -07:00
Sebastien Bourdeauducq
86f34e82c3 mibuild -> migen.build 2015-09-10 10:53:15 -07:00
Sébastien Bourdeauducq
07efe9d7b1 Merge pull request #31 from burnpanck/fix-value_bits_sign-mul
fix bug in value_bits_sign of mul operatiors
2015-09-10 10:25:57 -07:00
Yann Sionneau
b2c000e982 travis: only upload package when not building a pull request 2015-09-09 17:09:24 +02:00
Yves Delley
6e9d6d7a8e fixed bug in value_bits_sign of mul operatiors 2015-09-09 15:32:09 +02:00
Tim 'mithro' Ansell
12f5858850 Allow installing tools to a prefix.
(Defaults to /usr/local.)
2015-09-08 08:16:34 -07:00
Florent Kermarrec
40f47f447a create liteethmini and move liteeth to a separate repo (https://github.com/enjoy-digital/liteeth)
LiteEthMini is a subset of LiteEth intended to be used with a CPU and a software stack.
2015-09-08 01:33:57 +02:00
Florent Kermarrec
3f5d475b7b remove litepcie_phy_wrappers submodule 2015-09-07 13:20:16 +02:00
Florent Kermarrec
5301a1776d targets: remove USBSoC from minispartan6 (example available here: https://github.com/enjoy-digital/scarab-soc) 2015-09-07 12:47:40 +02:00
Florent Kermarrec
8e8cc8e5a6 move liteusb to a separate repo (https://github.com/enjoy-digital/liteusb) 2015-09-07 12:44:47 +02:00
Florent Kermarrec
e49a3c20c8 move litesata to a separate repo (https://github.com/enjoy-digital/litesata) 2015-09-07 12:27:40 +02:00
Florent Kermarrec
bbeb8a466d move litescope to a separate repo (https://github.com/enjoy-digital/litescope) 2015-09-07 12:04:04 +02:00
Florent Kermarrec
35e3853f6e move litepcie to a separate repo (https://github.com/enjoy-digital/litepcie) 2015-09-07 11:11:43 +02:00
Robert Jordens
94a2499ce5 AutoCSR: refactor common gatherer code 2015-09-06 20:00:14 -07:00
Sebastien Bourdeauducq
f1dc008d32 Simulator will be rewritten 2015-09-05 15:07:00 -06:00
Sebastien Bourdeauducq
dec2e23fc7 Remove code that will be into MiSoC or other packages. 2015-09-05 15:06:04 -06:00
Florent Kermarrec
7363f00867 mibuild/altera/common: use Altera instead of Quartus (coherency with xilinx/common) 2015-09-05 15:47:56 +02:00
Florent Kermarrec
bedf3ed9a6 misoclib/soc: fix add_constant when used for strings 2015-09-01 16:57:50 +02:00
Florent Kermarrec
a4808ace6f litecores: remove unneeded AutoCSR inheritance in example designs (thanks William D. Jones) 2015-08-26 22:36:48 +02:00
Florent Kermarrec
e91ce85cfd litescope/core/port: fix missing self.comb... 2015-08-24 20:12:39 +02:00
Florent Kermarrec
27b1dd7d9e litescope/core/port: fix EdgeDetector CSRs names 2015-08-24 19:40:53 +02:00
Florent Kermarrec
fd31e6ae61 litescope/core/port: fix LiteScopeEdgeDetector (refactoring issues) 2015-08-24 18:23:38 +02:00
Florent Kermarrec
f3d68a54d5 liteth/phy: simplify clk_freq in LiteEthPHY autodetect function (thanks Sebastien) 2015-08-22 16:30:42 +02:00
Florent Kermarrec
a1e4183b3f sdram/phy/s6ddrphy: fix comment on S6QuarterRateDDRPHY 2015-08-22 12:50:41 +02:00
Florent Kermarrec
de87d65f68 sdram/module: add P3R1GE4JGF DDR2 (Atlys) and MT41J128M16 DDR3 (Opsis, Novena) modules. 2015-08-22 12:42:44 +02:00
Florent Kermarrec
50e857e99c sdram/phy/s6ddrphy: add S6QuarterRateDDRPHY to run DDR3 at higher frequencies.
Built on top of S6HalfRateDDRPHY, exposes a 4 phases DFI interface to the controller with a 2x slower clock.
Validated on the Numato Lab opsis board (50MHz sys_clk/ DDR400), should also work on the Novena laptop (same DDR3 module).
2015-08-22 12:17:48 +02:00
Florent Kermarrec
8bb30a8620 liteeth/phy: fix autodetect (clk_freq not necessary passed in kwargs) 2015-08-22 12:08:49 +02:00
Florent Kermarrec
158fbe49ac sdram/phy/s6ddrphy: rename S6DDRPHY to S6HalfRateDDRPHY and use ORed wrdata_en/rddata_en (the controller already manages that) 2015-08-22 11:47:26 +02:00
Florent Kermarrec
b8f3fd53f1 README: small update 2015-08-22 11:39:54 +02:00
Florent Kermarrec
4acab79987 sdram/module: cleanup indent 2015-08-20 22:15:06 +02:00
Florent Kermarrec
63538a7d04 litecores: add -Ob option to make.py (allow to build with yosys for example) 2015-08-19 01:17:37 +02:00
Florent Kermarrec
3d3cd128d8 liteeth/phy: only use clk_freq for LiteEthPHYGMIIMII in autodetect 2015-08-19 01:17:35 +02:00
Florent Kermarrec
5253b0c06e migen/actorlib/packet: fix source.error in Depacketizer 2015-08-19 01:12:07 +02:00
Florent Kermarrec
9210df9e9f mibuild/xilinx/ise: update synthesis with yosis 2015-08-19 01:12:05 +02:00
Florent Kermarrec
6683485841 tools/flterm: replace int(a, 16) with int(a, 0) for --kernel-adr 2015-08-18 15:47:09 +02:00