Sebastien Bourdeauducq
|
eff7882721
|
dvisampler: support differential input
|
2013-07-04 19:18:24 +02:00 |
|
Sebastien Bourdeauducq
|
084aa64a2a
|
dvisampler/clocking: remove DCM_CLKGEN
|
2013-05-30 21:38:45 +02:00 |
|
Sebastien Bourdeauducq
|
611c4192b1
|
Use migen.fhdl.std
|
2013-05-22 17:10:13 +02:00 |
|
Sebastien Bourdeauducq
|
43ac5c8471
|
Remove undriven reset signals
|
2013-04-25 20:19:49 +02:00 |
|
Sebastien Bourdeauducq
|
8914969760
|
dvisampler/clocking: insert DCM_CLKGEN before PLL
|
2013-04-14 16:53:19 +02:00 |
|
Sebastien Bourdeauducq
|
4f4f260e76
|
Convert to new CSR API
|
2013-03-30 17:28:15 +01:00 |
|
Sebastien Bourdeauducq
|
1e860c7472
|
Use new Mibuild generic_platform API
|
2013-03-26 17:57:17 +01:00 |
|
Sebastien Bourdeauducq
|
fa2331e084
|
dvisampler/clocking: generate pix reset
|
2013-03-21 19:02:04 +01:00 |
|
Sebastien Bourdeauducq
|
0a14c3714b
|
dvisampler: software controlled phase detector
|
2013-03-21 00:46:29 +01:00 |
|
Sebastien Bourdeauducq
|
28cb97068c
|
dvisampler/clocking: proper pix5x reset synchronization
|
2013-03-18 20:31:59 +01:00 |
|
Sebastien Bourdeauducq
|
5126f616fb
|
dvisampler: use pix5x as IODELAY clock
|
2013-03-18 19:03:17 +01:00 |
|
Sebastien Bourdeauducq
|
3a0cf278fd
|
dvisampler: fixes
|
2013-03-17 15:41:50 +01:00 |
|
Sebastien Bourdeauducq
|
9f02ced39e
|
dvisampler: add clocking and phase detector
|
2013-03-17 14:43:10 +01:00 |