Sebastien Bourdeauducq
|
3196462311
|
add support for Verilog include paths
|
2013-12-12 23:17:51 +01:00 |
Robert Jordens
|
fe0263bb9a
|
mibuild/xilinx_ise: use ngdbuild_opt also for xst case
|
2013-12-06 12:15:22 +01:00 |
|
Robert Jordens
|
0aa6329edb
|
mibuild/xilinx_ise: add support for custom tools and options
|
2013-12-06 09:16:07 +01:00 |
|
Robert Jordens
|
e09e85ec8e
|
usrp_b100 platform
|
2013-12-03 22:51:52 +01:00 |
|
Robert Jordens
|
5447eb51ba
|
add zedboard platform
|
2013-12-03 22:51:52 +01:00 |
|
Robert Jordens
|
bfdc14fbc3
|
add initial ztex_115d platform
|
2013-12-03 22:51:52 +01:00 |
|
Sebastien Bourdeauducq
|
8d093a4a08
|
lx9 fixups
|
2013-12-03 22:51:52 +01:00 |
|
Sebastien Bourdeauducq
|
de830dc743
|
mibuild: use keyword arguments directly in build_cmdline
|
2013-12-01 17:56:07 +01:00 |
|
Sebastien Bourdeauducq
|
80be6acfd1
|
mibuild: add support for Yosys
|
2013-12-01 17:07:48 +01:00 |
|
Sebastien Bourdeauducq
|
6140fd2594
|
platforms/papilio_pro: add 2x SPI pins
|
2013-11-25 15:14:58 +01:00 |
|
Sebastien Bourdeauducq
|
6e48682a5e
|
platforms/papilio_pro: fix clock signal handling
|
2013-11-24 23:42:31 +01:00 |
|
Sebastien Bourdeauducq
|
c514fdc4a3
|
platforms/m1: use definition compatible with Mixxeo for VGA out
|
2013-11-24 14:00:22 +01:00 |
|
Sebastien Bourdeauducq
|
8efd9d11dc
|
remove stale .gitignore
|
2013-11-23 15:16:27 +01:00 |
|
Sebastien Bourdeauducq
|
be3b603b17
|
merge Mibuild into Migen
|
2013-11-23 10:45:15 +01:00 |
|
Sebastien Bourdeauducq
|
62ec66bc00
|
Add 'mibuild/' from commit '9d5931c969810a236de2a2713cfd5e509839d097'
git-subtree-dir: mibuild
git-subtree-mainline: 7e4024beb3
git-subtree-split: 9d5931c969
|
2013-11-23 10:34:28 +01:00 |
|
Sebastien Bourdeauducq
|
9d5931c969
|
platforms/mixxeo: update DVI input timing constraints
|
2013-11-19 23:15:42 +01:00 |
|
Sebastien Bourdeauducq
|
140ddd31a4
|
mixxeo: add DVI output pins
|
2013-09-17 18:14:41 +02:00 |
|
Sebastien Bourdeauducq
|
72eb523f7d
|
Merge branch 'master' of github.com:milkymist/mibuild
|
2013-09-16 19:17:09 +02:00 |
|
Sebastien Bourdeauducq
|
df7ca037cb
|
mixxeo: use -2 speed grade
|
2013-09-16 19:17:00 +02:00 |
|
Sebastien Bourdeauducq
|
ebe8a27de9
|
mixxeo: swap pairs 0 and 1 on DVI1
|
2013-09-14 19:36:02 +02:00 |
|
Sebastien Bourdeauducq
|
d57344b8ae
|
platforms/mixxeo: add LED
|
2013-09-06 23:10:01 +02:00 |
Florent Kermarrec
|
9569152309
|
altera_quartus: fix import _Fragment
|
2013-08-26 20:13:30 +02:00 |
|
Sebastien Bourdeauducq
|
316faa7fa8
|
platforms/m1: resetless by default
|
2013-08-14 00:46:30 +02:00 |
Nina Engelhardt
|
4ebbfa63bf
|
add mist synthesis mode to build
|
2013-08-12 13:13:25 +02:00 |
|
Sebastien Bourdeauducq
|
88611be368
|
xilinx_ise: cleanup
|
2013-08-08 00:15:35 +02:00 |
user
|
9d531ba06a
|
Fix missing string replace. Added support for 32-bit ISE if 64-bit version is missing on 64-bit system.
|
2013-08-08 00:07:35 +02:00 |
Nina Engelhardt
|
6e64016885
|
add edif build routines
|
2013-08-03 10:55:12 +02:00 |
|
Sebastien Bourdeauducq
|
275a7ea94a
|
Change license to BSD
|
2013-08-01 17:46:09 +02:00 |
|
Sebastien Bourdeauducq
|
702471aa3c
|
platforms/mixxeo: new pin assignments to ease routing
|
2013-07-29 12:24:49 +02:00 |
|
Sebastien Bourdeauducq
|
f7f19b78e4
|
Fragment -> _Fragment
|
2013-07-26 15:13:24 +02:00 |
|
Sebastien Bourdeauducq
|
78776b4bc9
|
platforms/mixxeo: new pin assignments for 4 HDMI input ports
|
2013-07-21 15:55:31 +02:00 |
|
Sebastien Bourdeauducq
|
b18cffb5e8
|
xilinx_ise: run tools like Project Navigator does to avoid weird bitgen behavior
|
2013-07-04 23:49:12 +02:00 |
|
Sebastien Bourdeauducq
|
05bc2885e9
|
Call finalize() after CRG creation
|
2013-07-04 19:49:39 +02:00 |
|
Sebastien Bourdeauducq
|
71c2c5813b
|
platforms/mixxeo: remove bank 3 DVI inputs
|
2013-07-04 19:27:28 +02:00 |
|
Sebastien Bourdeauducq
|
0883e99de3
|
Do not specify period constraints twice
|
2013-07-04 19:25:29 +02:00 |
|
Sebastien Bourdeauducq
|
0784cd164f
|
Add Mixxeo platform
|
2013-07-04 19:23:25 +02:00 |
|
Sebastien Bourdeauducq
|
1f3c941a78
|
platforms/m1: move generic platform commands to do_finalize
|
2013-07-04 19:22:59 +02:00 |
|
Sebastien Bourdeauducq
|
7e4552bbfc
|
lx9_microboard: improve compat with other boards
|
2013-06-27 19:30:57 +02:00 |
|
Robert Jordens
|
c1cf37f05a
|
add Avnet Spartan6 LX9 Micrboard platform
|
2013-06-27 19:18:47 +02:00 |
|
Robert Jordens
|
e233c62d27
|
* generic_platform.py: add a finalize() method
... to add e.g. timing constraints after the other modules have
had their say and when the signal names are known
|
2013-06-27 19:17:02 +02:00 |
|
Sebastien Bourdeauducq
|
6b56428a21
|
Shorter multipin signal definition
|
2013-06-25 22:57:31 +02:00 |
|
Sebastien Bourdeauducq
|
953e603915
|
xilinx_ise: improve parameter passing
|
2013-06-01 17:22:57 +02:00 |
|
Sebastien Bourdeauducq
|
548f2685bb
|
platform/rhino: rename ismm data out signal to locked
|
2013-05-30 11:06:02 +02:00 |
|
Sebastien Bourdeauducq
|
759858f739
|
Use migen.fhdl.std
|
2013-05-26 18:07:26 +02:00 |
|
Sebastien Bourdeauducq
|
e272e68fac
|
platforms/papilio_pro: swap tx/rx to be consistent with M1
|
2013-05-19 20:24:47 +02:00 |
|
Sebastien Bourdeauducq
|
fe64ade1ac
|
platforms/m1: add pots pins
|
2013-05-13 15:38:20 +02:00 |
|
Sebastien Bourdeauducq
|
7a2f31b2e8
|
platforms/papilio_pro: no reset signal by default
|
2013-05-07 19:10:18 +02:00 |
|
Sebastien Bourdeauducq
|
439f032921
|
crg: support for resetless system clock domain
|
2013-05-07 19:09:56 +02:00 |
|
Florent Kermarrec
|
6a4c194aab
|
platforms: add KC705
|
2013-05-07 10:31:12 +02:00 |
Brandon Hamilton
|
3d0894465c
|
mibuild: Add platform for Xilinx ML605 board
|
2013-05-06 14:21:56 +02:00 |