Commit Graph

7324 Commits

Author SHA1 Message Date
Sebastien Bourdeauducq e6bfad498d actorlib/control: 'for' generator 2012-01-15 22:08:33 +01:00
Sebastien Bourdeauducq c3d7b98b43 dma_wishbone: small syntax simplification thanks to None statements 2012-01-15 17:46:15 +01:00
Sebastien Bourdeauducq aa8b8da684 fhdl: allow None statements 2012-01-15 17:45:54 +01:00
Sebastien Bourdeauducq 85491efc68 wishbone_dma: convert to new endpoint API and fix some bugs 2012-01-15 16:41:15 +01:00
Sebastien Bourdeauducq 77b3c8e3bb bus: list signals 2012-01-15 15:48:51 +01:00
Sebastien Bourdeauducq 3c7161cc34 flow: saner endpoint management 2012-01-15 15:09:44 +01:00
Sebastien Bourdeauducq 20425703fa Wishbone: omit fixed LSBs 2012-01-13 17:29:05 +01:00
Sebastien Bourdeauducq f8d5c27ef8 Wishbone: omit fixed LSBs 2012-01-13 17:28:58 +01:00
Sebastien Bourdeauducq 570ea8ccf8 convtools -> tools 2012-01-13 17:07:46 +01:00
Sebastien Bourdeauducq 077fd9fdbc actorlib: Wishbone DMA read master (WIP) 2012-01-10 17:10:18 +01:00
Sebastien Bourdeauducq c93eb5f482 record: return offset 2012-01-10 17:10:03 +01:00
Sebastien Bourdeauducq a6e5f3e766 flow: simplify actor fragment interface 2012-01-10 15:54:51 +01:00
Sebastien Bourdeauducq 683e6b4a6c record: support aligned flattening 2012-01-09 19:16:11 +01:00
Sebastien Bourdeauducq b06e70d849 corelogic: FSM 2012-01-09 16:28:48 +01:00
Sebastien Bourdeauducq 47ae303846 record: cleanup 2012-01-09 15:20:09 +01:00
Sebastien Bourdeauducq cef1c5d3af record: better exception code 2012-01-09 15:17:24 +01:00
Sebastien Bourdeauducq 89bf704b2b record: preserve order 2012-01-09 15:14:42 +01:00
Sebastien Bourdeauducq bdcaeb159b flow: draw network graph 2012-01-09 14:21:54 +01:00
Sebastien Bourdeauducq d26ded93d8 flow: actor busy signal 2012-01-09 14:21:45 +01:00
Sebastien Bourdeauducq d2d55372d8 Composer (WIP) 2012-01-08 13:56:11 +01:00
Sebastien Bourdeauducq 34c69db14a endpoint: add _i/_o suffix on signal names 2012-01-07 21:21:46 +01:00
Sebastien Bourdeauducq cdd9977a40 fhdl: better signal naming heuristic 2012-01-07 15:30:14 +01:00
Sebastien Bourdeauducq b6763c28ea constant: equality 2012-01-07 12:29:47 +01:00
Sebastien Bourdeauducq 7b395b565e verilog: split comb block, use assign statements 2012-01-07 12:19:06 +01:00
Sebastien Bourdeauducq f209bf6b33 convtools -> tools 2012-01-07 00:39:28 +01:00
Sebastien Bourdeauducq 0b195a244d flow: network 2012-01-07 00:33:28 +01:00
Sebastien Bourdeauducq 3c1dada9cf record: compatibility check 2012-01-06 23:00:23 +01:00
Sebastien Bourdeauducq 588f1a259e flow: plumbing 2012-01-06 17:24:05 +01:00
Sebastien Bourdeauducq 8f1bf508ca actor: simplified automatic control 2012-01-06 15:35:17 +01:00
Sebastien Bourdeauducq a3bf877802 ALA: use records for tokens 2012-01-06 14:32:00 +01:00
Sebastien Bourdeauducq 1905eb3707 README: update copyright year 2012-01-06 14:15:57 +01:00
Sebastien Bourdeauducq 038992e7d2 corelogic: record 2012-01-06 11:20:44 +01:00
Sebastien Bourdeauducq d7a3bed44c Signal repr 2012-01-06 11:20:33 +01:00
Sebastien Bourdeauducq 4c040810bc Merge branch 'master' of github.com:milkymist/migen 2012-01-05 19:27:55 +01:00
Sebastien Bourdeauducq b60abfaa4a Convert -> convert 2012-01-05 19:27:45 +01:00
Sebastien Bourdeauducq 9366a226bb Convert -> convert 2012-01-05 19:27:33 +01:00
Alain Péteut 6bd8566c48 setup.py: fix to catch all modules
Signed-off-by: Alain Péteut <peteut@space.unibe.ch>
2011-12-27 11:19:37 +01:00
Alain Péteut 5f53e6473a Add setup script 2011-12-24 13:46:40 +01:00
Sebastien Bourdeauducq 1ce4fbdb98 example: flow conversion 2011-12-23 00:36:07 +01:00
Sebastien Bourdeauducq edf90870c2 flow: sum and division actors 2011-12-23 00:35:53 +01:00
Sebastien Bourdeauducq 76db20cd9f fhdl: encapsulate replicated constants 2011-12-23 00:35:13 +01:00
Sebastien Bourdeauducq f0aac4b50f flow: actor class 2011-12-22 19:37:16 +01:00
Sebastien Bourdeauducq 566295dea3 csr: use optree 2011-12-22 19:36:56 +01:00
Sebastien Bourdeauducq ba40f58491 corelogic: operator tree 2011-12-22 15:46:19 +01:00
Sebastien Bourdeauducq 8a394f9159 verilog: comb reset 2011-12-22 00:04:53 +01:00
Sebastien Bourdeauducq 4d6be55e9f verilog: break down Convert function 2011-12-21 23:08:50 +01:00
Sebastien Bourdeauducq 26e0b817e8 verilog: ignore variable property in combinatorial block 2011-12-21 23:00:36 +01:00
Sebastien Bourdeauducq 7456195775 Consistent names 2011-12-21 22:57:07 +01:00
Sebastien Bourdeauducq 47d321cd75 README: Flow 2011-12-20 00:07:46 +01:00
Sebastien Bourdeauducq d9dc604c99 README: Core Logic, Bus, Bank 2011-12-19 23:24:31 +01:00