Florent Kermarrec
3710afe7fe
microudp.c: add #ifdef on ethmode (bios generation for gmii or mii was broken)
2015-04-12 20:59:50 +02:00
Florent Kermarrec
4abe8e1d9e
microudp: fix if (
2015-04-12 18:52:35 +02:00
Florent Kermarrec
515398634f
liteeth/phy/gmii_mii: add clock counter and use it in bios to select mode
2015-04-12 18:42:52 +02:00
Sebastien Bourdeauducq
c7361f1cdf
software/common.mak: fix alignment in quiet output
2015-04-03 17:43:29 +08:00
Sebastien Bourdeauducq
73d3b8487c
crt0-or1k: clean up indentation
2015-04-03 13:23:28 +08:00
Sebastien Bourdeauducq
63f14f3f30
libbase: implement flush_l2_cache for or1k
2015-04-02 16:47:03 +08:00
Florent Kermarrec
f4c35e358e
software/bios/sdram: small clean up
2015-03-27 18:24:19 +01:00
Florent Kermarrec
6245dd7b6f
software/bios/sdram: for now desactivate random on address test since it seems to trigger a L2 cache or LASMIcon bug on at least de0nano/minispartan6
...
Memtest sometimes reports 1 or 2 errors with de0nano/minispartan6 on this new test when used with LASMICON. Minicon seems fine. We will have to investigate on this issue.
2015-03-27 16:43:22 +01:00
Florent Kermarrec
f85a4f004b
software/bios/sdram: add random addressing to memtest
...
testing memories with linear access is not good enough. Adding random addressing allow us to detect more eventual issues on our L2 cache or SDRAM controller.
2015-03-27 15:49:16 +01:00
Florent Kermarrec
38d24b637e
software/bios/sdram: make seed_to_data static
2015-03-26 23:05:20 +01:00
Florent Kermarrec
e79a716425
software/bios/sdram: select the type of data we want to generate for memtest with TEST_RANDOM_DATA (debugging hardware is easier with a simple counter)
2015-03-26 22:16:31 +01:00
Florent Kermarrec
257706517e
software/memtest: remove Mixxeo/M1 hardcoded values in bandwidth computation
2015-03-26 00:01:42 +01:00
Florent Kermarrec
1fc24e66dc
sofware/memtest: use MAIN_RAM_SIZE from mem.h
2015-03-25 19:00:07 +01:00
Florent Kermarrec
94b62eff8b
libcompiler-rt: add ucmpdi2.o
2015-03-25 17:57:42 +01:00
Florent Kermarrec
69e9032d49
sofware/memtest: update bandwidth registers
2015-03-25 17:25:39 +01:00
Florent Kermarrec
6492ef1efa
linker-sdram.ld: sdram mem region is now called main_ram
2015-03-25 16:45:19 +01:00
Florent Kermarrec
9bc71f374a
rename sdram mapping to main_ram
2015-03-21 21:01:46 +01:00
Florent Kermarrec
b75e4b237d
software/bios/memtest: add data bus test (0xAAAAAAAA, 0x55555555) on a small portion of the test zone.
...
we now need to add another random addressing test to avoid linear access on L2 cache
2015-03-21 20:29:15 +01:00
Florent Kermarrec
84b631c929
liteeth/mac/core: add with_padding option (enabled by default) and change with_hw_preamble_crc option to with_preamble_crc
2015-03-19 14:52:02 +01:00
Florent Kermarrec
473997df26
cpuif: add CSR_ prefix to CSR base addresses (avoid conflicts between CSR and mems bases)
2015-03-02 16:52:17 +01:00
Florent Kermarrec
8280acd3a7
sdram: only keep frontend logic and sdram core declaration in soc/sdram.py, move other logic to sdram/core
2015-03-02 12:17:49 +01:00
Florent Kermarrec
0980becb56
sdram: improve memtest by adding 2 different writes/reads
...
doing only a write and read is not enough: if we reloaded a fpga with write that is not working after functional fpga, it would not trigger an error.
2015-03-02 10:52:22 +01:00
Florent Kermarrec
2c51adcd68
misoclib: better organization (create cores categories: cpu, mem, com, ...)
2015-02-28 09:40:44 +01:00
Florent Kermarrec
07b9cabd0d
gensoc: make it more generic (a SoC does not necessarily have a CPU)
2015-02-27 16:39:00 +01:00
Florent Kermarrec
be0eb8d265
use cachesize reported in wishbone2lasmi
2015-02-27 14:13:38 +01:00
Yann Sionneau
edb1622668
spiflash: BB write support
2014-11-27 23:10:39 +08:00
Florent Kermarec
603c2641bb
new Ethernet MAC
2014-11-20 16:47:22 -08:00
Sebastien Bourdeauducq
09773df186
software: make compiler-rt a submodule
2014-11-06 18:00:28 -08:00
Sebastien Bourdeauducq
410f250d2a
software: remove setjmp
2014-09-23 21:57:05 +08:00
Sebastien Bourdeauducq
14d53526be
libbase: use __builtin_setjmp and __builtin_longjmp
2014-09-21 17:43:17 +08:00
Sebastien Bourdeauducq
36434b62f0
sdram: merge DFII_PIX_RDDATA_SIZE and DFII_PIX_WRDATA_SIZE
2014-09-03 15:02:38 +08:00
Sebastien Bourdeauducq
2388bfabc3
bios: support DDR3 write leveling and read calibration. This makes the full DDR3 SODIMM work on the KC705.
2014-09-03 14:25:26 +08:00
Sebastien Bourdeauducq
6decb357f1
bios: add sdrrderr
2014-09-01 15:23:37 +08:00
Sebastien Bourdeauducq
57335bdf3f
bios: add DQ filtering to sdrrd, add sdrrdbuf command
2014-09-01 14:58:58 +08:00
Sebastien Bourdeauducq
a2096ff083
libcompiler-rt: add moddi3
2014-08-28 16:54:12 +08:00
Sebastien Bourdeauducq
0ebdf2be6d
bios/sdram: cleanup
2014-08-08 21:57:58 +08:00
Sebastien Bourdeauducq
b61dced909
bios/sdram: set ODT and RESET_N through DFII
2014-08-08 21:57:42 +08:00
Sebastien Bourdeauducq
8deadc5760
dfii: drive ODT and RESET_N
2014-08-08 21:56:35 +08:00
Florent Kermarrec
293ac09673
sdramphy/bios: make sdrrd/sdrwr generic
2014-08-08 19:25:10 +08:00
Sebastien Bourdeauducq
213cb43ae5
Keep only basic SoC designs in MiSoC
2014-08-03 12:30:15 +08:00
Sebastien Bourdeauducq
8349543732
style
2014-07-05 18:56:20 +02:00
Sebastien Bourdeauducq
2bb821c571
crt-or1k: trim useless exception vectors
2014-07-05 18:53:23 +02:00
Sebastien Bourdeauducq
4c2a2090b1
libbase: remove crt during make clean
2014-06-01 23:17:43 +02:00
Sebastien Bourdeauducq
b26ac465bd
crt0: remove macadress for or1k as well
2014-05-24 10:43:50 +02:00
Robert Jordens
6deeca064f
bios/crt0.S: remove unused macaddr, add syscall handler stub
2014-05-24 10:41:54 +02:00
Robert Jordens
ed902bfcdf
crt: add umoddi3
2014-05-24 10:38:55 +02:00
Sebastien Bourdeauducq
dc2024f54d
bios: remove references to 'DDR' SDRAM, as we also support SDR SDRAM
2014-05-23 21:31:26 +02:00
Sebastien Bourdeauducq
398608e997
bios: fill delay slot in boot_helper
2014-05-14 16:08:25 +02:00
Sebastien Bourdeauducq
13e74b8b4f
software: factorize exception_handler
2014-05-14 15:01:38 +02:00
Sebastien Bourdeauducq
edf567a0cd
bios: fix boot for or1k
2014-05-14 15:01:02 +02:00
