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Author SHA1 Message Date
Robert Jordens
6e1195415e genlib/roundrobin: fix n==1 case (correctly) 2013-07-26 09:33:33 +02:00
Robert Jordens
b8ff2f2792 genlib/roundrobin.py: fix n==1 case 2013-07-26 00:41:08 +02:00
Sebastien Bourdeauducq
b96eb339af fhdl: compact Instance syntax 2013-07-25 20:34:19 +02:00
Sebastien Bourdeauducq
b7ed19c6c5 fhdl: do not export Fragment 2013-07-25 18:52:54 +02:00
Sebastien Bourdeauducq
fcd48dafec examples/two_dividers: demonstrate InsertCE and InsertReset decorators 2013-07-25 17:56:55 +02:00
Sebastien Bourdeauducq
b367932498 fhdl: introduce module decorators 2013-07-25 17:56:31 +02:00
Sebastien Bourdeauducq
cabae0c32b genlib: remove direct uses of Fragment 2013-07-24 19:25:14 +02:00
Sebastien Bourdeauducq
83e2b0243d examples: remove direct uses of Fragment 2013-07-24 18:47:25 +02:00
Sebastien Bourdeauducq
3a3bc2e876 doc/dataflow: update to new API 2013-07-22 20:54:32 +02:00
Sebastien Bourdeauducq
cf22aae06f doc: ASMI -> LASMI 2013-07-22 18:28:57 +02:00
Sebastien Bourdeauducq
794c4e6041 doc/fhdl: document Module API 2013-07-22 16:48:05 +02:00
Sebastien Bourdeauducq
aef78b2395 doc/bus/CSR: add automatic CSR name info 2013-07-22 16:47:49 +02:00
Robert Jördens
fe18397acc wishbone.py: add Crossbar (concurrent/parallel/many-to-many interconnect) 2013-07-22 10:30:44 +02:00
Robert Jördens
5bc9a0b383 fsm.py: set reset_state 2013-07-22 10:30:40 +02:00
Sebastien Bourdeauducq
78776b4bc9 platforms/mixxeo: new pin assignments for 4 HDMI input ports 2013-07-21 15:55:31 +02:00
Sebastien Bourdeauducq
0cef98373f doc/bus: update 2013-07-20 17:01:58 +02:00
Sebastien Bourdeauducq
411e6ec114 fhdl/tools: do not export resort_statements 2013-07-17 16:50:09 +02:00
Sebastien Bourdeauducq
d5d2e64dc3 Revert "fhdl/tools/group_by_target: remove resort_statements" 
This reverts commit 939f01cee2.
 2013-07-17 16:49:26 +02:00
David Carne
9190568685 genlib/fifo/AsyncFIFO: fix data corruption bug 2013-07-17 12:10:39 +02:00
Sebastien Bourdeauducq
939f01cee2 fhdl/tools/group_by_target: remove resort_statements 2013-07-17 10:38:39 +02:00
David Carne
16ebe41028 fhdl/tools: BUGFIX: fix group_by_target grouping 
group_by_target does not properly combine target groups if statements
are presented in the order:

 ({A}, statement1)
 ({B}, statement2)
 ({A, B}, statement3)

which returns groups:

 ({A, B}, [statement1, statement3])
 ({B}, [statement2])

This patch fixes group_by_target such that the resulting group is:

 ({A, B}, [statement1, statement2, statement3])
 2013-07-17 10:14:39 +02:00
Sebastien Bourdeauducq
5b36f688ea Remove ASMI 2013-07-16 18:50:50 +02:00
David Carne
faa8b7c49a fhdl/tools: clock domain merging for clock renaming 2013-07-16 18:17:44 +02:00
Sebastien Bourdeauducq
b016a60b85 lasmibus: fix master locking 2013-07-15 21:45:07 +02:00
Sebastien Bourdeauducq
7083764b53 genlib/fifo: add test bench 2013-07-15 21:36:39 +02:00
Sebastien Bourdeauducq
65a0b12812 actorlib/spi/DMAController: export length/storage/trigger 2013-07-13 17:13:15 +02:00
Sebastien Bourdeauducq
6595b9a111 actorlib/spi/SingleGenerator: export CSRs 2013-07-13 17:12:51 +02:00
Sebastien Bourdeauducq
c2d6f14087 flow/actor/PipelinedActor: clean up 2013-07-12 18:52:34 +02:00
Sebastien Bourdeauducq
6aa1e0c199 actorlib/spi/DMAWriteController: len -> flen 2013-07-11 19:22:56 +02:00
Florent Kermarrec
f5ddd33e7e dfi: split phase description 2013-07-10 19:56:47 +02:00
Sebastien Bourdeauducq
1d33c61308 examples/sim/abstract_transactions_lasmi: check data 2013-07-10 19:11:02 +02:00
Sebastien Bourdeauducq
43fe16ef73 bus/lasmibus: add separate req/data ack to target and initiator 2013-07-10 19:09:51 +02:00
Sebastien Bourdeauducq
af6ef0a3b4 dma_lasmi/Writer: fix default FIFO depth 2013-07-07 20:01:55 +02:00
Sebastien Bourdeauducq
fa8112c3f5 dma_lasmi/Reader: handle ack=1 when stb=0 2013-07-07 18:57:05 +02:00
Sebastien Bourdeauducq
7e6fbd31a4 lasmibus/crossbar: simplify master ack generation 2013-07-07 18:56:43 +02:00
Sebastien Bourdeauducq
b18cffb5e8 xilinx_ise: run tools like Project Navigator does to avoid weird bitgen behavior 2013-07-04 23:49:12 +02:00
Sebastien Bourdeauducq
05bc2885e9 Call finalize() after CRG creation 2013-07-04 19:49:39 +02:00
Sebastien Bourdeauducq
71c2c5813b platforms/mixxeo: remove bank 3 DVI inputs 2013-07-04 19:27:28 +02:00
Sebastien Bourdeauducq
0883e99de3 Do not specify period constraints twice 2013-07-04 19:25:29 +02:00
Sebastien Bourdeauducq
0784cd164f Add Mixxeo platform 2013-07-04 19:23:25 +02:00
Sebastien Bourdeauducq
1f3c941a78 platforms/m1: move generic platform commands to do_finalize 2013-07-04 19:22:59 +02:00
Sebastien Bourdeauducq
b68c00d36f pytholite: fix kwargs handling 2013-07-03 17:20:05 +02:00
Sebastien Bourdeauducq
4096a785f9 examples/pytholite/basic: demonstrate generator arguments 2013-07-03 16:35:24 +02:00
Sebastien Bourdeauducq
0aa58f5dcf pytholite: support generator arguments 2013-07-03 16:35:07 +02:00
Sebastien Bourdeauducq
04efee7847 fhdl: mark variable as deprecated 2013-06-30 20:14:20 +02:00
Sebastien Bourdeauducq
6420b56908 examples/complex: do not use variable 2013-06-30 19:27:01 +02:00
Sebastien Bourdeauducq
71b89e4c46 fhdl/verilog: lower complex slices before reset insertion 2013-06-30 14:32:47 +02:00
Sebastien Bourdeauducq
ded5e569eb fhdl/tools: separate complex slice lowerer from basic lowerer 2013-06-30 14:32:19 +02:00
Sebastien Bourdeauducq
9c59ea1e26 genlib/misc: remove bitreverse 2013-06-30 14:31:25 +02:00
Robert Jördens
a255296171 support re-slicing and non-unit step size 
* support slicing of Slice/Cat/Replicate through lowering
* support non-unit step size slices through unpacking and Cat()
 2013-06-30 14:03:34 +02:00