23 commits

Author	SHA1	Message	Date
Florent Kermarrec	69e869893d	remane GenSoC to SoC (more coherent and we will add support for multiple SoCs with their own Wisbbone/CSR buses in the future)	2015-02-28 11:36:15 +01:00
Florent Kermarrec	2c51adcd68	misoclib: better organization (create cores categories: cpu, mem, com, ...)	2015-02-28 09:40:44 +01:00
Florent Kermarrec	5e2e9338d2	bios: we can now use -Ot with_rom True on targets to force bios implementation in integrated rom (can speed up debug we don't want to reflash SPI or NOR flash)	2015-02-27 17:22:44 +01:00
Florent Kermarrec	b031c5edae	targets: fix MiniSoC	2015-02-27 17:12:37 +01:00
Florent Kermarrec	367db268ad	reserve csr_map 0-->16 for gensoc internal csrs	2015-02-27 14:18:13 +01:00
Sebastien Bourdeauducq	a3909bb5e2	Merge branch 'master' of https://github.com/m-labs/misoc	2015-02-26 21:28:12 -07:00
Yann Sionneau	8364fe6674	target/kc705: allow access to pll_sys signal before BUFG	2015-02-26 15:56:10 -07:00
Florent Kermarrec	5e8a0c496d	gensoc: add mem_map and mem_decoder to avoid duplications	2015-02-26 20:12:27 +01:00
Florent Kermarrec	00862a383c	liteeth: fix import (from liteeth --> from misoclib.liteeth)	2015-02-26 09:48:37 +01:00
Florent Kermarrec	73ab271f9a	targets/kc705: fix csr address conflict on eth	2015-02-18 10:45:18 -07:00
Florent Kermarrec	0a38b8c74a	add LiteX external core and remove ethmac	2015-02-18 10:43:44 -07:00
Yann Sionneau	edb1622668	spiflash: BB write support	2014-11-27 23:10:39 +08:00
Yann Sionneau	cf92821fcf	Refactor directory hierarchy of sdram phys and controllers	2014-11-27 22:09:10 +08:00
Sebastien Bourdeauducq	33530e0921	ethmac: style/renaming	2014-11-20 18:01:48 -08:00
Sebastien Bourdeauducq	7eaa5f7372	targets/kc705: avoid ddrphy/ethphy address conflict	2014-11-20 17:11:57 -08:00
Florent Kermarec	603c2641bb	new Ethernet MAC	2014-11-20 16:47:22 -08:00
Florent Kermarrec	c0c17030fd	spi_flash: simplify usage by removing cmd, cmd_width, addr_width parameters	2014-09-04 15:23:39 +08:00
Sebastien Bourdeauducq	0eeb0ad9eb	targets/kc705: add ddrphy to CSR map	2014-09-01 16:40:10 +08:00
Sebastien Bourdeauducq	35327a427f	targets/kc705: BIOS XIP	2014-08-22 17:13:10 +08:00
Sebastien Bourdeauducq	41c8c172b5	targets/kc705: integrate DDR3	2014-08-08 21:58:41 +08:00
Sebastien Bourdeauducq	fb48b89bac	platforms/kc705: generate clocks for SDRAM	2014-08-06 23:53:26 +08:00
Sebastien Bourdeauducq	37968e649b	targets/kc705: use PLL for clocking	2014-08-03 21:42:39 +08:00
Sebastien Bourdeauducq	f7a7137127	targets: add basic KC705	2014-08-03 15:48:30 +08:00