Commit Graph

460 Commits

Author SHA1 Message Date
Sebastien Bourdeauducq 70e97e0456 Fix various errors from new bitwidth/signedness system conversion 2012-11-29 23:36:55 +01:00
Sebastien Bourdeauducq 261166d92b fhdl/verilog: make signal behave as integers in arithmetic (MyHDL style)
See http://jandecaluwe.com/hdldesign/counting.html
2012-11-29 22:59:54 +01:00
Sebastien Bourdeauducq 55d143a454 fhdl/structure: add unary minus 2012-11-29 22:52:57 +01:00
Sebastien Bourdeauducq d8e478efee Replace Signal(bits_for(... with Signal(max=... 2012-11-29 21:53:36 +01:00
Sebastien Bourdeauducq 50ed73c937 New specification for width and signedness 2012-11-29 21:22:38 +01:00
Sebastien Bourdeauducq 6eebfce44a Refactor Case 2012-11-29 01:11:15 +01:00
Sebastien Bourdeauducq 070652cc39 pytholite/reg: use source id in dictionary 2012-11-29 00:09:35 +01:00
Sebastien Bourdeauducq fee22a4631 Remove Constant 2012-11-28 23:18:43 +01:00
Sebastien Bourdeauducq 2a3ef28041 examples/sim/dataflow: update to new APIs 2012-11-28 22:44:14 +01:00
Sebastien Bourdeauducq 39d577d65e examples/dataflow/dma: update to new APIs 2012-11-28 22:42:01 +01:00
Sebastien Bourdeauducq 7c4b5931bc examples/basic: remove unroll example 2012-11-28 22:16:02 +01:00
Sebastien Bourdeauducq 59831e0485 fhdl/structure: improved bits_for function 2012-11-28 18:39:44 +01:00
Sebastien Bourdeauducq 11b1e53224 visit/NodeTransformer: copy most nodes 2012-11-28 17:50:55 +01:00
Sebastien Bourdeauducq a2bcbfdf8f fhdl/tools: use NodeTransformer to lower arrays 2012-11-28 17:46:15 +01:00
Sebastien Bourdeauducq 5440fa715c examples/basic/arrays: add array assignment to fragment 2012-11-26 22:47:35 +01:00
Sebastien Bourdeauducq 3bc15024ac fhdl/tools: use NodeVisitor 2012-11-26 21:40:23 +01:00
Sebastien Bourdeauducq e3a983d731 Remove unroll 2012-11-26 20:07:48 +01:00
Sebastien Bourdeauducq 1460f069f6 fhdl/structure: remove deprecated MemoryPort 2012-11-26 19:36:43 +01:00
Sebastien Bourdeauducq 5183774ec8 bus/wishbone2asmi: do not use MemoryPort 2012-11-26 19:14:59 +01:00
Sebastien Bourdeauducq fc85ca53ad actorlib/spi: do not use MemoryPort 2012-11-26 18:27:59 +01:00
Sebastien Bourdeauducq 2418367c7a examples/sim/memory: do not use MemoryPort 2012-11-26 18:19:10 +01:00
Sebastien Bourdeauducq dac0d11e52 actorlib/sim: Dumper 2012-11-24 00:00:07 +01:00
Sebastien Bourdeauducq 27d87c9412 fhdl/structure: disable we_granularity when larger than width 2012-11-23 23:08:12 +01:00
Sebastien Bourdeauducq d2c61e6a90 sim/generic/multiread: do not return spurious items 2012-11-23 23:07:25 +01:00
Sebastien Bourdeauducq 74721b206f pytholite: fix import of _Slice 2012-11-23 21:20:18 +01:00
Sebastien Bourdeauducq 95122bb778 pytholite/io: support memory 2012-11-23 20:36:09 +01:00
Sebastien Bourdeauducq f42683b71e fhdl/structure/Memory: fix we width 2012-11-23 19:21:52 +01:00
Sebastien Bourdeauducq 784a399431 examples/memory: use new get_port API 2012-11-23 19:18:08 +01:00
Sebastien Bourdeauducq 0f6215a13a fhdl/structure: add Memory.get_port API 2012-11-23 19:17:49 +01:00
Sebastien Bourdeauducq 9d3e218863 fhdl: use object creation counter (HUID) as hash. This finally makes the generated code textually the same across runs. 2012-11-23 18:38:03 +01:00
Sebastien Bourdeauducq 3971600917 fhdl/structure: use sets for memories and instance collections 2012-11-23 17:20:08 +01:00
Sebastien Bourdeauducq 7c6ebcf753 examples/pytholite/uio: demonstrate memories 2012-11-23 16:24:20 +01:00
Sebastien Bourdeauducq f3efd74dfd uio: support memories 2012-11-23 16:23:24 +01:00
Sebastien Bourdeauducq ab31b4d99c bus: memory initiator 2012-11-23 16:22:50 +01:00
Sebastien Bourdeauducq 0b7dd7bdce pytholite/io: fix Wishbone writes + support sel attribute 2012-11-23 13:40:46 +01:00
Sebastien Bourdeauducq 20d87682ad examples/pytholite/uio: simulate and convert Pytholite 2012-11-23 13:10:40 +01:00
Sebastien Bourdeauducq 4c216d8f11 pytholite/io: support Wishbone reads 2012-11-23 13:09:55 +01:00
Sebastien Bourdeauducq 0b24a2ff36 pytholite/io: support Wishbone writes 2012-11-23 12:41:50 +01:00
Sebastien Bourdeauducq f098c5c695 pytholite/compiler: pass keyword arguments to gen_io 2012-11-23 12:40:57 +01:00
Sebastien Bourdeauducq 51e2e6ecd0 fhdl/verilog: remove empty cases 2012-11-18 16:32:51 +01:00
Sebastien Bourdeauducq 89643bc434 sim/ipc/Message: convert values 2012-11-17 23:19:40 +01:00
Sebastien Bourdeauducq e92af9de59 pytholite/transel: use python3-compatible comparison methods 2012-11-17 23:16:07 +01:00
Sebastien Bourdeauducq 6434ddd95a examples/pytholite: add uio example 2012-11-17 22:26:14 +01:00
Sebastien Bourdeauducq b6b4c5d70e uio/ioo: fix UnifiedIOSimulation 2012-11-17 22:25:42 +01:00
Sebastien Bourdeauducq 1cabcb3c3f uio: support generator trampolining in simulation 2012-11-17 19:59:22 +01:00
Sebastien Bourdeauducq be68ecfc72 uio: add simulation I/O object 2012-11-17 19:55:33 +01:00
Sebastien Bourdeauducq 7add4c6f3c uio: unified I/O object 2012-11-17 19:54:50 +01:00
Sebastien Bourdeauducq d10df1a8ab actorlib/sim: swap TokenExchanger parameters 2012-11-17 19:46:28 +01:00
Sebastien Bourdeauducq d4baac6c0f bus/csr: allow specifying existing interface 2012-11-17 19:44:25 +01:00
Sebastien Bourdeauducq 86090e1cbd bus/asmibus: swap port position to be consistent with wishbone API 2012-11-17 19:42:39 +01:00