Yann Sionneau
|
6e876c63ad
|
pipistrello: fix FPGA speed grade
|
2015-06-14 23:19:27 +02:00 |
Florent Kermarrec
|
70bc4ecb59
|
mibuild/platforms/pipistrello: add _n suffix to usb fifo pins
|
2015-05-01 15:49:33 +02:00 |
|
Florent Kermarrec
|
aea7308051
|
mibuild/platforms/minispartan6: rename ftdi_fifo to usb_fifo and fix rd_n/wr_n swap
|
2015-05-01 15:48:42 +02:00 |
|
Florent Kermarrec
|
15625236c1
|
platforms/kc705: add PCIe pins
|
2015-04-17 00:51:16 +02:00 |
|
Florent Kermarrec
|
89bb90fe2a
|
global: pep8 (E265)
|
2015-04-13 21:22:46 +02:00 |
|
Florent Kermarrec
|
f97d7ff44c
|
global: pep8 (E261, E271)
|
2015-04-13 21:21:30 +02:00 |
|
Florent Kermarrec
|
37ef9b6f3a
|
global: pep8 (E231)
|
2015-04-13 20:50:03 +02:00 |
|
Florent Kermarrec
|
1051878f4c
|
global: pep8 (E302)
|
2015-04-13 20:45:35 +02:00 |
|
Florent Kermarrec
|
17e5249be0
|
global: pep8 (replace tabs with spaces)
|
2015-04-13 20:07:07 +02:00 |
|
Yann Sionneau
|
ce429841d5
|
kc705: fix typo in platform file (LPC definition)
|
2015-04-02 20:21:20 +08:00 |
|
Florent Kermarrec
|
15e24b6c10
|
mibuild/platforms: fix minispartan6
|
2015-03-30 11:42:14 +02:00 |
Sebastien Bourdeauducq
|
21c5fb6f6c
|
Merge branch 'master' of github.com:m-labs/migen
|
2015-03-30 00:52:15 +08:00 |
|
Sebastien Bourdeauducq
|
19a6157478
|
platforms/lx9_microboard,usrp_b100: fix bitgen opts
|
2015-03-30 00:44:56 +08:00 |
|
Florent Kermarrec
|
263fc47728
|
platforms/kc705: fix .bin generation with ISE and Vivado
|
2015-03-29 21:15:20 +08:00 |
|
Florent Kermarrec
|
17f3590a7c
|
platforms/kc705: add iMPACT programmer
|
2015-03-29 12:15:39 +02:00 |
|
Florent Kermarrec
|
ec080479da
|
mibuild/sim: use the same architecture we use for others backends
|
2015-03-27 14:14:49 +01:00 |
|
Florent Kermarrec
|
de31103cce
|
platforms/minispartan6: add ftdi_fifo pins
|
2015-03-22 11:20:22 +01:00 |
|
Florent Kermarrec
|
200979fb81
|
platforms/minispartan6: fix IOStandard/Slew, add FpgaProg programmer, change default clock to 32MHz
|
2015-03-22 03:37:27 +01:00 |
|
Florent Kermarrec
|
1d2e7e8390
|
mibuild/platforms/minispartan6: adapt to recent changes (able to build simple example)
|
2015-03-21 18:31:50 +01:00 |
|
Florent Kermarrec
|
78b4f313bf
|
mibuild/platforms/minispartan6: add device parameter (board can be populated with lx9 or lx25)
|
2015-03-21 18:28:09 +01:00 |
|
Florent Kermarrec
|
1a03c340c9
|
mibuild/platforms: review and fix small mistakes
|
2015-03-21 18:23:35 +01:00 |
|
Florent Kermarrec
|
3a38626556
|
mibuild/platforms: add minispartan6 (from Matt O'Gorman)
|
2015-03-21 18:22:26 +01:00 |
Robert Jordens
|
4fe888702d
|
pipistrello: switch is a button
|
2015-03-19 18:56:49 +01:00 |
|
Robert Jordens
|
47ea451315
|
pipistrello: compress and load bitstream at 6MHz
|
2015-03-19 18:48:45 +01:00 |
|
Robert Jordens
|
860b72c8b6
|
pipistrello: rename sdram->ddram
|
2015-03-19 18:48:22 +01:00 |
|
Florent Kermarrec
|
500e58ce7d
|
mibuild/platform/versa: fix clock_constraints
|
2015-03-17 15:25:10 +01:00 |
|
Florent Kermarrec
|
c06ab82f13
|
mibuild/platforms/versa: add ethernet clock constraints
|
2015-03-17 12:04:00 +01:00 |
|
Florent Kermarrec
|
ba2aeb08be
|
mibuild/platforms/versa: add rst_n
|
2015-03-17 11:51:34 +01:00 |
|
Florent Kermarrec
|
b3b1209c62
|
mibuild/platforms: add ethernet to versa
|
2015-03-16 22:24:10 +01:00 |
|
Florent Kermarrec
|
fab0b0b161
|
mibuild/platforms: add user_dip_btn to versa
|
2015-03-16 22:11:15 +01:00 |
|
Florent Kermarrec
|
d6041879dd
|
mibuild/lattice: use new Toolchain/Platform architecture
|
2015-03-16 21:24:21 +01:00 |
|
Florent Kermarrec
|
e903b62af1
|
mibuild/altera: use new Toolchain/Platform architecture
|
2015-03-16 21:07:55 +01:00 |
|
Florent Kermarrec
|
f7bfa13144
|
mibuild: add initial Lattice Diamond support (with ECP3 Versa board platform skeleton)
|
2015-03-16 19:02:34 +01:00 |
|
Sebastien Bourdeauducq
|
6a979a8023
|
mibuild: sanitize default clock management
|
2015-03-14 00:10:08 +01:00 |
|
Sebastien Bourdeauducq
|
702d177c85
|
mibuild: get rid of Platform factory function, cleanup
|
2015-03-13 23:25:15 +01:00 |
|
Florent Kermarrec
|
658d4d4c49
|
platforms/sim: add ethernet pins
|
2015-03-06 10:20:26 +01:00 |
|
Sebastien Bourdeauducq
|
154ad54a8e
|
platforms/kc705: fix imports
|
2015-03-03 02:03:14 +00:00 |
|
Florent Kermarrec
|
382ca374c3
|
mibuild: initial Verilator support
|
2015-03-01 18:27:46 +01:00 |
|
Sebastien Bourdeauducq
|
961b4bfb4c
|
platforms/pipistrello: remove unconnected SDRAM pins
|
2015-02-28 16:20:44 -07:00 |
|
Robert Jordens
|
03431ece9f
|
pipistrello: fix ddram dqs, cleanup constraints, add pullup/downs
|
2015-02-28 16:16:47 -07:00 |
|
Robert Jordens
|
75290aa0f3
|
pipistrello: switch back to xc3sprog and fast (papilio) speed
|
2015-02-28 16:16:47 -07:00 |
|
Florent Kermarrec
|
eb8ba145de
|
kx705: add programmer parameter
|
2015-02-28 23:34:57 +01:00 |
|
Robert Jordens
|
8de5b947bd
|
pipistrello: use fpgaprog
|
2015-02-26 21:34:02 -07:00 |
|
Robert Jordens
|
5b5d2d15b8
|
add pipistrello platform
|
2015-02-26 21:33:42 -07:00 |
|
Sebastien Bourdeauducq
|
ba26a400e3
|
Merge branch 'master' of https://github.com/m-labs/migen
|
2015-02-26 21:32:39 -07:00 |
|
Sebastien Bourdeauducq
|
28c219ebd2
|
platforms/kc705: add user SMA clock
|
2015-02-26 16:22:22 -07:00 |
|
Yann Sionneau
|
dbdb263acc
|
mibuild/kc705: add missing pins on FMC LPC
|
2015-02-26 15:54:41 -07:00 |
|
Florent Kermarrec
|
8da1faf310
|
mibuild: move identifier to platforms
|
2015-02-26 19:00:43 +01:00 |
|
Florent Kermarrec
|
e6a21b2305
|
mibuild: fix missing xilinx_common -->xilinx.common change
|
2015-02-26 14:04:36 +01:00 |
|
Florent Kermarrec
|
bd5ed0977b
|
platforms: add default_clk_freq/default_clk_name (to use it on simple designs to test MiSOC on various platforms)
|
2015-02-26 12:51:57 +01:00 |