Sebastien Bourdeauducq
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22f7d1716e
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Remove some boilerplate
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2012-05-24 19:22:27 +02:00 |
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Sebastien Bourdeauducq
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5d0d249236
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README: update build command
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2012-05-24 19:04:30 +02:00 |
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Sebastien Bourdeauducq
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473c75898e
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software: include.mak -> common.mak
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2012-05-24 19:02:59 +02:00 |
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Sebastien Bourdeauducq
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2500e71cb7
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software: merge libextra into libbase
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2012-05-24 19:01:47 +02:00 |
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Sebastien Bourdeauducq
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2823034a7b
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software/libextra: remove blockdev + fatfs
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2012-05-24 18:51:27 +02:00 |
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Sebastien Bourdeauducq
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f6f42293d1
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Clock frequency detection
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2012-05-22 13:23:44 +02:00 |
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Sebastien Bourdeauducq
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4d754dbb33
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bios: serial, network and flash boot support
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2012-05-21 22:57:12 +02:00 |
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Sebastien Bourdeauducq
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5917048a37
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minimac: add tx start register
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2012-05-21 22:56:41 +02:00 |
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Sebastien Bourdeauducq
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275ed9cd9c
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bios: timer support
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2012-05-21 22:56:21 +02:00 |
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Sebastien Bourdeauducq
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e33399de82
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bios/ddrinit: use new padding scheme for address register
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2012-05-21 22:55:45 +02:00 |
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Sebastien Bourdeauducq
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493b181af1
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bank/description: pad unaligned multi-word registers at the top
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2012-05-21 22:55:23 +02:00 |
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Sebastien Bourdeauducq
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9958aab342
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tools/mkmmimg: remove LZMA option
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2012-05-21 22:01:57 +02:00 |
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Sebastien Bourdeauducq
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d03ee7a89f
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libbase: unmask UART interrupt correctly
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2012-05-21 20:01:21 +02:00 |
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Sebastien Bourdeauducq
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9449bbea0a
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Add LICENSE file
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2012-05-21 19:56:23 +02:00 |
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Sebastien Bourdeauducq
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c01594f9fd
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Common interrupt numbers
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2012-05-21 19:52:41 +02:00 |
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Sebastien Bourdeauducq
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94245517f2
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Add timer
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2012-05-21 19:46:04 +02:00 |
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Sebastien Bourdeauducq
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8ad251c94c
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Connect Ethernet IRQ
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2012-05-20 23:48:41 +02:00 |
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Sebastien Bourdeauducq
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4e18e45686
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Add Ethernet MAC
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2012-05-20 00:30:03 +02:00 |
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Sebastien Bourdeauducq
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7d18736ff2
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Update gitignore
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2012-05-17 01:42:08 +02:00 |
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Sebastien Bourdeauducq
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79124d822b
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Identifier
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2012-05-17 01:41:41 +02:00 |
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Sebastien Bourdeauducq
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141269b384
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Get CSR base addresses from include file
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2012-05-16 10:36:46 +02:00 |
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Sebastien Bourdeauducq
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bb798176fc
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Common include files
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2012-05-16 10:20:04 +02:00 |
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Sebastien Bourdeauducq
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b6aa40d845
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bios: automatically enable hardware memory controller and test memory
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2012-05-15 19:29:26 +02:00 |
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Sebastien Bourdeauducq
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68cd445662
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bus/wishbone2asmi: fix cache tag size
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2012-05-15 15:18:03 +02:00 |
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Sebastien Bourdeauducq
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0bea1e2589
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asmi: dat_wm high to disable data write
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2012-05-15 14:41:54 +02:00 |
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Sebastien Bourdeauducq
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425c8b8e70
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asmicon/multiplexer: fix read tag delay
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2012-05-15 13:13:40 +02:00 |
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Sebastien Bourdeauducq
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7ecfd60368
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bios: more DDR diagnostic functions
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2012-05-14 20:07:57 +02:00 |
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Sebastien Bourdeauducq
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2ccdade88e
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tb/asmicon_wb: better access pattern
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2012-04-30 19:08:31 -05:00 |
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Sebastien Bourdeauducq
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f2c20e4af0
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bus/asmibus/hub: hack to prevent comb loops
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2012-04-30 17:11:42 -05:00 |
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Sebastien Bourdeauducq
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398ece8fe2
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fhdl/verilog: add option to display which comb blocks are run
This is a debug hack to help find combinatorial loops in designs.
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2012-04-30 16:38:40 -05:00 |
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Sebastien Bourdeauducq
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0b62e573ae
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sim: pass extra keyword arguments to Verilog converter
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2012-04-30 16:38:17 -05:00 |
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Sebastien Bourdeauducq
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87ee4baaf0
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tb/asmicon_wb: test asmicon with wishbone bridge
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2012-04-26 17:53:05 -05:00 |
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Sebastien Bourdeauducq
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902908bd3b
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tb/asmicon: do not keep files
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2012-04-26 17:21:10 -05:00 |
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Sebastien Bourdeauducq
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6a52e44d09
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fhdl: support len() on signals
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2012-04-08 18:06:22 +02:00 |
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Sebastien Bourdeauducq
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b9c533be51
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bank/csrgen: allow specifying existing CSR interface
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2012-04-06 14:59:09 +02:00 |
Brandon Hamilton
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49b58a03a0
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Optionally accept iverilog simulator options
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2012-04-03 12:58:19 +02:00 |
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Sebastien Bourdeauducq
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19b1cc2529
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Remove uses of pads, new constraints system
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2012-04-02 19:22:17 +02:00 |
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Sebastien Bourdeauducq
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2a4e49e381
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fhdl: phase out pads
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2012-04-02 19:21:43 +02:00 |
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Sebastien Bourdeauducq
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1b60c7ff40
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vpi: delete merged Icarus Verilog patch
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2012-04-02 19:11:32 +02:00 |
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Sebastien Bourdeauducq
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623e8e436a
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fhdl/verilog: do not attempt to initialize instance and mem output signals
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2012-04-02 12:59:42 +02:00 |
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Sebastien Bourdeauducq
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d2c4afe66c
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asmicon: various fixes. Now produces convincing refresh/read sequences.
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2012-04-01 23:24:24 +02:00 |
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Sebastien Bourdeauducq
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f5671c566f
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tb/asmicon: global test bench
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2012-04-01 23:23:45 +02:00 |
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Sebastien Bourdeauducq
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6e3b25ebb6
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bus/dfi: reset active low signals to 1
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2012-04-01 17:43:24 +02:00 |
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Sebastien Bourdeauducq
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d3c6b8d16f
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sim/proxy: support lists
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2012-04-01 17:19:53 +02:00 |
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Sebastien Bourdeauducq
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f3ae22f488
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fhdl/verilog: initialize internal read-only signals with their reset values
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2012-04-01 16:39:11 +02:00 |
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Sebastien Bourdeauducq
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185bd66ee4
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tb/asmicon: bankmachine test bench
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2012-03-31 18:11:29 +02:00 |
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Sebastien Bourdeauducq
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0dfc215fe8
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corelogic/roundrobin: handle correctly special case with 1 request source
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2012-03-31 18:01:40 +02:00 |
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Sebastien Bourdeauducq
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b1e5b9ef36
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tb/asmicon/bankmachine: test buffer and NACK
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2012-03-31 10:06:44 +02:00 |
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Sebastien Bourdeauducq
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c129c98e10
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tb/asmicon/bankmachine: selector test bench
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2012-03-31 09:56:22 +02:00 |
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Sebastien Bourdeauducq
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ac7d89a4fe
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asmicon/bankmachine: fixes
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2012-03-31 09:55:52 +02:00 |