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43 Commits

Author SHA1 Message Date
Yann Sionneau b8283ec92c vivado progammer: allow to specify flash chip 2015-10-12 20:07:01 +02:00
Florent Kermarrec 9210df9e9f mibuild/xilinx/ise: update synthesis with yosis 2015-08-19 01:12:05 +02:00
Sebastien Bourdeauducq abbb76ce84 ise: do not use LCK_cycle:6 by default 2015-07-29 11:09:42 +08:00
Robert Jordens 6468fa3db4 xilinx: ensure we chdir() back after build 2015-07-14 12:53:43 -06:00
Sebastien Bourdeauducq 73ea404380 Merge branch 'master' of https://github.com/m-labs/migen 2015-07-05 10:53:32 +02:00
Tim 'mithro' Ansell 1d1f8510d3 Allow using non-milkymist cables with UrJTAG. 2015-07-05 10:53:09 +02:00
Tim 'mithro' Ansell 0df9c16e69 mibuild: Adding error checking around xsvf generation 2015-07-02 16:51:03 +02:00
Tim 'mithro' Ansell 8daf5e32c1 Adding support for programming with FPGALink 
Steps for getting it set up.

 * Get libfpgalink dependencies
   sudo apt-get install \
      build-essential libreadline-dev libusb-1.0-0-dev python-yaml

 * Build libfpgalink
   wget -qO- http://tiny.cc/msbil | tar zxf -
   cd makestuff; ./scripts/msget.sh makestuff/common
   cd libs; ../scripts/msget.sh libfpgalink
   cd libfpgalink; make deps

 * Convert libfpgalink to python3
   wget -O - http://www.swaton.ukfsn.org/bin/2to3.tar.gz | tar zxf -
   cd examples/python
   cp fpgalink2.py fpgalink3.py
   ../../2to3/2to3 fpgalink3.py | patch fpgalink3.py

 * Set your path's correctly.

   export LD_LIBRARY_PATH=$(pwd)/libfpgalink/lin.x64/rel:$LD_LIBRARY_PATH
   export PYTHON_PATH=$(pwd)/libfpgalink/examples/python:$PYTHON_PATH
 2015-07-02 16:44:39 +02:00
Tim 'mithro' Ansell 055f7d51fc mibuild/xilinx: Adding programming with the Digilent Adept tools 2015-07-02 16:03:44 +02:00
Florent Kermarrec 7afa3d61d9 mibuild/xilinx: Xilinx's FPGAs do not necessary share the same primitives: add xilinx_s7_special_overrides and specific XilinxDDROutputS7 implementation 
Fix DDROutput implementation on spartan6 (tested with LiteETH's GMII phy)
 2015-07-02 09:42:12 +02:00
Florent Kermarrec 7d8f4d1009 mibuild/xilinx/ise: fix source and set source to False by default on Windows (tools supposed to be in the PATH) 2015-06-19 00:52:39 +02:00
Florent Kermarrec 743a5f6ea9 mibuild/xilinx/ise: simplify default_ise_path 2015-06-19 00:40:05 +02:00
William D. Jones 6370acd968 Xilinx Platforms now use cmd.exe on Windows instead of bash to run scripts 
(remove MSYS dependency)
 2015-06-19 00:30:22 +02:00
Robert Jordens 99fb0d4619 ise: move -user_new_parser to xst_opt 2015-05-08 11:18:45 +08:00
William D. Jones 472665b81d Add a command line option (-use_new_parser yes) to Xilinx XST to force use of the newer parser for older FPGAs. 2015-04-25 23:01:07 +08:00
Florent Kermarrec 083d371af4 mibuild: add support for libraries, move .replace("\\", "/") to generic_platform.py and execute it only on Windows machines. 
We need to support libraries when Migen is used as a wrapper on large VHDL designs using libraries.
 2015-04-17 00:11:31 +02:00
Florent Kermarrec 5f225c0475 global: pep8 (E225) 2015-04-13 21:11:13 +02:00
Florent Kermarrec 69764f2e22 global: pep8 (E401) 2015-04-13 20:54:19 +02:00
Florent Kermarrec 1051878f4c global: pep8 (E302) 2015-04-13 20:45:35 +02:00
Florent Kermarrec 17e5249be0 global: pep8 (replace tabs with spaces) 2015-04-13 20:07:07 +02:00
Sebastien Bourdeauducq e1702c422c introduce conversion output object (prevents file IO in FHDL backends) 2015-04-08 20:28:23 +08:00
Robert Jordens aac953dd90 vivado: support phys_opt 2015-04-04 19:00:22 +08:00
Robert Jordens 9506f69390 vivado: add support for pre_synthesis_commands 2015-04-04 19:00:01 +08:00
Robert Jordens 4522956f11 vivado: make _build_files() a method and rename 2015-04-04 18:59:50 +08:00
Sebastien Bourdeauducq 1d1189506a mibuild: support multiple specifications of include file and sources 2015-04-04 18:58:02 +08:00
Florent Kermarrec 17f3590a7c platforms/kc705: add iMPACT programmer 2015-03-29 12:15:39 +02:00
Florent Kermarrec 7440ccd65b mibuild/xilinx/programmer: add iMPACT programmer (for sb: I need it in Windows for now since I was not able to get XC3SPROG working) 2015-03-21 20:27:11 +01:00
Florent Kermarrec 993059a59c mibuild/xilinx/common: add XilinxDDROutput 2015-03-16 22:53:05 +01:00
Sebastien Bourdeauducq aef9275c99 mibuild/xilinx: export special_overrides dictionary 2015-03-14 10:45:11 +01:00
Sebastien Bourdeauducq d34b7d7a6b mibuild/xilinx: remove obsolete CRG_DS 2015-03-14 00:27:24 +01:00
Sebastien Bourdeauducq 6a979a8023 mibuild: sanitize default clock management 2015-03-14 00:10:08 +01:00
Sebastien Bourdeauducq 702d177c85 mibuild: get rid of Platform factory function, cleanup 2015-03-13 23:25:15 +01:00
Florent Kermarrec ff266bc2ee migen/genlib/io: add DifferentialOutput and Xilinx implementation 2015-03-12 19:30:57 +01:00
Florent Kermarrec c8ba8cde8e migen/genlib: add io.py to define generic I/O specials to be lowered by mibuild 2015-03-12 18:38:53 +01:00
Robert Jordens 3e84c66ba9 vivado: permit resources without pins 
This is required if the LOC is done by another, external constraints set,
as in the case of the Zynq Processing System Instance.
 2015-03-09 13:30:19 +01:00
Sebastien Bourdeauducq f154c2e7ec xilinx/programmer/vivado: fix Linux support 2015-03-03 02:06:39 +00:00
Florent Kermarrec b53e2b0d6e fix xilinx/programmer with Vivado 2015-02-28 19:33:20 +01:00
Florent Kermarrec 87d8ff2de7 xilinx/programmer: add source of vivado's settings (need to be tested on a linux machine) 2015-02-28 03:38:47 +01:00
Florent Kermarrec 54a8a52e90 xilinx/programmer: add partial flash_bitstream for vivado (can flash full bitstream, need to be adapted to flash part of the flash (bios, ...)) 2015-02-27 09:05:23 +01:00
Robert Jordens 2b0937153d xilinx/programmer: fix xc3sprog (GenericProgrammer) 2015-02-26 21:36:15 -07:00
Robert Jordens ca52aa5b8c add fpgaprog programmer 2015-02-26 21:33:49 -07:00
Florent Kermarrec e27a94e7fc mibuild: add VivadoProgrammer (only load_bitstream) 2015-02-26 12:31:19 +01:00
Florent Kermarrec b3faf5f0da mibuild: better file organization (create directory for each vendor and move programmers in it) 2015-02-26 12:25:59 +01:00