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450 commits

Author SHA1 Message Date
Filip Kokosinski
5844376d53 soc_core: adapt memory map for mainline Linux with mor1kx 
Mainline Linux expects it to be loaded at the physical address of 0x0.
Change the MAIN_RAM base address to 0x0 and update exception vector
during the booting process.
 2019-09-23 15:34:52 +02:00
Benjamin Herrenschmidt
735ea196dd This will allow it to be built for microwatt out of tree 
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
 2019-09-23 08:40:54 +02:00
Ilia Sergachev
2400f0f43d fix crc32 2019-09-09 13:19:43 +02:00
Tim 'mithro' Ansell
2a41f0d2a4 Use SMALL_CRC to enable smaller CRC versions. 
@xobs created a smaller code size version of the CRC functions. Enable
these if someone uses the `SMALL_CRC` define.
 2019-09-02 14:48:30 -07:00
Tim 'mithro' Ansell
083337441a Remove extra whitespace. 2019-09-02 14:47:20 -07:00
Sean Cross
c0e723868e libbase: crc16: commit smaller version of crc16 
Signed-off-by: Sean Cross <sean@xobs.io>
 2019-09-02 14:44:18 -07:00
Sean Cross
a59d0efca0 libbase: crc32: add smaller version 
Signed-off-by: Sean Cross <sean@xobs.io>
 2019-09-02 14:44:18 -07:00
Florent Kermarrec
c179741cf3 software/bios: switch to standard CRLF 
Avoid setting terminal to "implicit CR in every LF" mode.
 2019-08-27 09:45:44 +02:00
Florent Kermarrec
ffebd2076c bios/tools: allow disabling CRC check on serialboot (to speedup debug/loading large images when only serial is available) 2019-08-26 17:15:01 +02:00
Gabriel L. Somlo
6d844a038a software: use native toolchain for same host, target architectures 
LiteX rightfully assumes that most often the target software must
be cross-compiled from an x86 host platform. However, LiteX can be
also built on a 'linux-riscv64' platform (e.g. Fedora's riscv64
port), where the software for riscv64 targets should be compiled
using the native toolchain.

Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
 2019-08-23 09:04:55 -04:00
Florent Kermarrec
9d4b7cd515 bios/sdram: set init done after memtest (for standalone LiteDRAM controllers) 2019-08-14 19:09:58 +02:00
Florent Kermarrec
31bfb54667 software/libbase/mdio: set data before clock, revert two cycle turnaround and test with different phys 2019-08-09 13:26:31 +02:00
Florent Kermarrec
6d94c07d70 software/libase/mdio: cleanup and reduce raw_turnaround by 1 cycle 2019-08-09 10:33:42 +02:00
Florent Kermarrec
82cd557c24 software/bios: add Ethernet PHY MDIO read/write/dump commands 2019-08-09 09:26:41 +02:00
Florent Kermarrec
25ca0a8b71 soc: generate git header and show migen/litex git sha1 in bios 2019-07-27 20:27:53 +02:00
Florent Kermarrec
bc7ab637dd bios/sdram: fix compilation warning 2019-07-25 07:46:14 +02:00
Florent Kermarrec
e673fce445 bios/boot: fix default EMULATOR_RAM_BASE 2019-07-23 10:28:19 +02:00
Florent Kermarrec
462d12bacc bios/boot: define EMULATOR_RAM_BASE if not defined, add KERNEL_IMAGE_RAM_OFFSET 2019-07-22 21:54:24 +02:00
Florent Kermarrec
af61688d1d bios/boot: fix booting rework 
- keep emulator.bin in a specific ram (for now)
- print message when falling back to boot.bin
- print destination on tftp download (to ease debug)
 2019-07-22 11:47:41 +02:00
Mateusz Holenko
8335f13fb1 bios/boot: rework netboot/flashboot for VexRiscv in linux variant 
Get rid of NETBOOT_LINUX_VEXRISCV/FLASHBOOT_LINUX_VEXRISCV defines
and use information about CPU_TYPE and CPU_VARIANT instead.

Use common kernel/rootfs/device tree/emulator images layout
when booting over network and from flash.
 2019-07-15 16:02:58 +02:00
Gabriel L. Somlo
e42f33ede1 soc_core: additional csr_alignment follow-up fixes 
- Update a few additional places to use DFII_ADDR_SHIFT instead of
  a hard-coded 4, which assumed 32-bit alignment.

- Force 64-bit alignment Rocket -- the only supported configuration!

This is a fixup for commit f4770219, tested on Rocket and 64bit Linux.

Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
 2019-07-08 10:15:14 -04:00
Florent Kermarrec
f4770219fa soc_core: add csr_alignment to allow 64-bit alignment with 64-bit CPUs 2019-07-08 10:20:51 +02:00
Florent Kermarrec
927b7c13a2 soc/integration: uniformize configuration constants declaration in SoCs (use self.config instead self.add_constant) 2019-07-08 08:57:05 +02:00
Florent Kermarrec
96f45bbd87 software/libbase/id: update code (length is now fixed to 256) 2019-07-06 17:18:34 +02:00
Florent Kermarrec
05b667bb95 bios/main: fix #ifdefs for fw command 2019-06-28 22:42:02 +02:00
Florent Kermarrec
37687579e0 libnet/tftp: fix compilation warning 2019-06-28 22:32:45 +02:00
Florent Kermarrec
9f3c8a9b8a bios/main: fix spiflash compilation warnings 2019-06-28 22:18:24 +02:00
Gabriel L. Somlo
5a42dbf333 BIOS: TFTP: ASCII spinner progress indicator (cosmetic) 2019-06-27 10:31:33 -04:00
Mateusz Holenko
2ee194b259 bios: add fw (flash write) command 2019-06-25 16:58:12 +02:00
Florent Kermarrec
8f6e66ca52 make sure #!/usr/bin/env python3 is before copyright header 2019-06-24 07:29:24 +02:00
Florent Kermarrec
daa4307d9e add CONTRIBUTORS file and add copyright header to all files 2019-06-23 23:23:56 +02:00
Florent Kermarrec
361f9d0dff bios/sdram: set init_done/error when DDRCTRL is present (litedram_gen) 2019-06-22 10:55:15 +02:00
Ambroz Bizjak
ca70ea91e4
bios: Fix build when ethphy is present but ethmac is not. 
While testing my Ethernet DMA, I renamed the `ethmac` module to `ethmac_dma` so that it wouldn't be used from the BIOS, but I got an undefined reference to `eth_init` because `bios.c` checks different CSR defines than the code that defines `eth_init`.
 2019-06-13 01:02:22 +02:00
Florent Kermarrec
ca4e7811e9 software/bios: change prompt to "litex" in green. 2019-06-07 11:13:36 +02:00
Gabriel L. Somlo
f88b85a31c software/libbase: memcpy: simple, arch-width agnostic implementation 
Remove optimizations targeted specifically at rv32 architecture,
allowing memcpy to work on all word sizes.

Since this is "only" the BIOS, it is also arguably better to
optimize for size rather than performance, given that control
will be quickly handed over to some other program being loaded.

Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
 2019-06-04 14:48:51 -04:00
bunnie
ab0b2cac2e fix signed char type to be explicitly signed 2019-06-03 06:01:13 +00:00
bunnie
200d413def update stdint.h to include c99 types 
needed for some third party libraries to compile
 2019-06-02 22:27:12 +00:00
Florent Kermarrec
961101d809 bios/irc: remove compilation workaround 2019-05-25 09:24:48 +02:00
Florent Kermarrec
712977a0cf software/bios/isr.c: workaround compilation issue (need to be fixed) 2019-05-24 10:18:50 +02:00
Gabriel L. Somlo
1a530cf27d soc/cores/cpu/rocket: Support for 64-bit RocketChip (experimental) 
Simulate a Rocket-based 64-bit LiteX SoC with the following command:

  litex/tools/litex_sim.py [--with-sdram] --cpu-type=rocket

NOTE: Synthesizes to FPGA and passes timing at 50MHz on nexys4ddr
(with vivado) and ecp5versa (with yosys/trellis/nextpnr), but at
this time does not yet properly initialize physical on-board DRAM.
On ecp5versa, using '--with-ethernet', up to 97% of the available
TRELLIS_SLICE capacity is utilized.

Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
 2019-05-23 15:59:51 -04:00
Florent Kermarrec
1ea22d49b7 software/include/base/csr-defs.h: add specific CSR_IRQ_MASK/PENDING for Minerva 2019-05-15 22:40:32 +02:00
Florent Kermarrec
f25707012f software/bios/boot: remove specific linux commands (not needed with device tree) 2019-05-14 11:45:16 +02:00
Florent Kermarrec
6e4ac1c493 LICENSE: clarify 2019-05-11 09:26:51 +02:00
Gabriel L. Somlo
c264a00964 soc/integration/cpu_interface: more arch-specific address size fixes 
When generating arch-specific include files (generated/[mem|csr].h)
ensure address literal defines are suffixed by 'L', denoting their
'unsigned long' type. This inhibits compiler warnings when values
computed based on these constants are cast to pointers.

Also ensure csr_[read|write][b|w|l]() function declarations have
'unsigned long' address arguments.

Finally, restore the correct (32-bit, (unsigned *)) expected
behavior of the MMPTR() macro, inadvertently converted to an
arch-specific sized access (unsigned long *) by commit 5c2b8685.

Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
 2019-05-08 16:03:36 -04:00
Florent Kermarrec
b7e3713388 bios/boot/ update linux memory mapping 2019-05-07 11:59:28 +02:00
Florent Kermarrec
fcd518b5d0 bios/boot: add specific flash_boot for linux with vexriscv 2019-05-04 11:27:01 +02:00
Florent Kermarrec
1ba1ad9a00 bios/boot: rename MM_RAM to EMULATOR_RAM 2019-05-03 19:47:36 +02:00
Florent Kermarrec
21bf10383d bios/boot: add liftoff banner just before booting 2019-05-02 18:26:35 +02:00
Florent Kermarrec
8f4685b3b1 bios/boot/netboot: only get boot.bin as default, add linux_vexriscv netboot config 2019-05-02 16:34:41 +02:00
Gabriel L. Somlo
5c2b8685fc software: use "unsigned long" for address values, also 8-byte alignment 
Enable future support for 64-bit CPU models.
 2019-04-29 15:03:38 -04:00
Florent Kermarrec
e8f3c49127 software/libnet/microudp: rearrange send_packet, add comments and remove txlen padding 2019-04-24 11:32:40 +02:00
Florent Kermarrec
44e0cdda9a software/libnet/microudp: speed-up ARP by changing timeout/tries 
First ARP request does not seem to be transmitted (the link is probably not
fully established). Reduce the timeout between tries and increase number of
tries.
 2019-04-24 09:55:41 +02:00
Florent Kermarrec
9ee6c35b42 tools: move from litex.soc.tools to litex.tools and fix usb.core import 2019-04-20 10:44:53 +02:00
Florent Kermarrec
13a76ec7fb software/libnet/microudp: simplify txbuffer managment 2019-04-12 18:47:31 +02:00
Florent Kermarrec
3441eb05cb software/libnet/microudp: cleanup eth_init 2019-04-12 17:15:09 +02:00
Florent Kermarrec
92a79c6dc1 software/libnet/microudp: simplify rxbuffer managment 2019-04-12 17:14:07 +02:00
Florent Kermarrec
fdeff7f64f software/libnet/microudp: set raw frame size to ETHMAC_SLOT_SIZE 2019-04-12 17:09:50 +02:00
Florent Kermarrec
1569e2e0cf software/libnet: remove use of ethmac_mem.h 2019-04-12 17:08:29 +02:00
Florent Kermarrec
c7ac96761c bios/sdram: add __attribute__((unused)) on cdelay 2019-04-11 22:26:58 +02:00
Florent Kermarrec
f8dcdb70d2 software/libnet: add #ifdef on eth_init 2019-04-10 16:16:47 +02:00
Caleb Jamison
1f0b3f8124 Add ifdef check for MAIN_RAM_SIZE 2019-03-31 10:33:39 -05:00
Florent Kermarrec
dd214d2d21 bios/main: align SoC info, show CPU speed on CPU line, show L2 2019-03-30 11:49:39 +01:00
Florent Kermarrec
6599f7bb50 bios/main: move sdrinit 2019-03-30 10:56:17 +01:00
Florent Kermarrec
b92b89ab92 bios/main: print boot sequence only if sdr_ok 2019-03-30 10:19:00 +01:00
Florent Kermarrec
f4369c8fb2 bios/main: remove csr functions (not used and only supported by lm32), improve help presentation 2019-03-29 19:40:24 +01:00
Florent Kermarrec
66dffb7071 software/bios: improve readibility, add soc informations 2019-03-29 00:51:16 +01:00
Florent Kermarrec
317dba8314 software/bios/sdram: use specific ERR_DDRPHY_BITSLIP/NMODULES computation 
In the future, the PHYs should generated these constants.
 2019-03-05 18:03:24 +01:00
Florent Kermarrec
ca63db4040 bios/sdram: use burstdet detection for ECP5DDRPHY init 2019-03-05 13:27:06 +01:00
Florent Kermarrec
4bf789eab9 soc/software/bios/boot: add vexriscv workaround 
Flushing icache was working correctly on previous version of Vexriscv, understand
why it's no longer the case.
 2019-03-01 09:16:48 +01:00
Florent Kermarrec
e38dfd99e8 soc/software/sdram: fix compilation on ultrascale 2019-02-25 16:12:21 +01:00
Florent Kermarrec
3dd529e40b soc/software/bios/sdram: add ECP5 support 2019-02-25 14:41:33 +01:00
Florent Kermarrec
2fd6d0e7e1 soc/software/bios/sdram: improve write_level robustness 2019-02-25 14:38:24 +01:00
Florent Kermarrec
36772b75f6 soc/software/bios/sdram: improve sdrlevel readibility 2019-02-25 14:37:31 +01:00
Florent Kermarrec
6a980781d3 soc/software/bios/sdram: add helpers for rst/inc of delays 2019-02-25 14:36:47 +01:00
Florent Kermarrec
ebe0d567f8 bios/sdram: only show read delays when they are valid. 2018-12-19 11:19:47 +01:00
Florent Kermarrec
67a2590235 bios/sdram: reduce write leveling scan range 2018-12-19 11:18:19 +01:00
Florent Kermarrec
a27b5a3be1 update Ultrascale DDRPHY 2018-12-18 11:25:21 +01:00
Florent Kermarrec
f8f3683aaa bios/sdram: reduce scans verbosity on ultrascale 2018-12-17 16:00:44 +01:00
Florent Kermarrec
efce434aa9 bios/sdram: use ddrphy_half_sys8x_taps_read() for KUSDDRPHY 2018-12-17 11:43:21 +01:00
Tim 'mithro' Ansell
22d454efcd Hack to fix #136. 2018-12-16 14:40:10 -08:00
Florent Kermarrec
2ace45e6f8 soc/cores/cpu/vexriscv: update submodule 2018-12-12 09:38:53 +01:00
Florent Kermarrec
909cff1940 bios/sdram: flush l2 cache only when present 2018-11-26 18:37:45 +01:00
Florent Kermarrec
2ad83778bf bios: allow testing main_ram at init when using an external controller 2018-11-26 15:21:00 +01:00
William D. Jones
89c702187a libbase/crt0-picorv32: Add support for .data sections. 2018-11-21 00:13:13 -05:00
Florent Kermarrec
86fd945bc3 bios/main: fix typo on mor1kx 2018-11-13 11:16:06 +01:00
Florent Kermarrec
fc0d5c3963 bios/sdram: iterate multiple time for write leveling and add vote to eliminate transcients 2018-11-05 18:44:28 +01:00
Florent Kermarrec
2624ba48c2 bios/sdram: replace DDR3_MR1 constant with DDRX_MR1 2018-11-05 10:47:25 +01:00
William D. Jones
e56f71824d libbase/crt0-picorv32: Emulate support for a relocatable IRQ vector (hardcoded at synthesis time). 2018-11-01 05:02:04 -04:00
William D. Jones
77389d27b5 libbase/crt0-picorv32: Ensure BSS is cleared on boot. 2018-11-01 02:18:03 -04:00
Florent Kermarrec
ab6a530a24 bios/sdram: s7ddrphy now has bitslip in fabric, show scan for each module/bitslip and remove silent mode 2018-10-18 13:42:51 +02:00
Florent Kermarrec
915c2f417a bios/sdram: improve write/read leveling 
write_leveling: select last 0 to 1 transition.
read_leveling: do it by module (select best bitslip for each module)
 2018-10-10 10:42:56 +02:00
Florent Kermarrec
10624c26da bios/main: handle all types of carriage return (\r, \n, \r\n or \n\r) 2018-10-09 10:06:51 +02:00
Stafford Horne
dafdb8df72 Fix compiler warnings from GCC 8.1 
Fix these 2 warnings:

 litex/build/sim/core/libdylib.c:42:5: warning: 'strncpy' specified bound 2048 equals destination size
 [-Wstringop-truncation]
     strncpy(last_err, s, ERR_MAX_SIZE);
     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 In function 'set_last_error',

 litex/soc/software/libbase/exception.c:28:13: warning: function declaration isn't a prototype [-Wstrict-prototypes]
  static char emerg_getc()
 2018-10-04 23:07:48 +09:00
Florent Kermarrec
948527b0fe cores/cpu: revert vexriscv (it seems there is a regression in last version) 2018-10-02 12:30:11 +02:00
Florent Kermarrec
6e327cda26 bios/sdram: rewrite write_leveling (simplify and improve robustness) 2018-10-01 15:38:19 +02:00
William D. Jones
0ff6d58605 Distinguish crt0 variants more clearly, update BIOS to use CTR variant (as it has no .data section). 2018-09-24 14:48:54 -04:00
Sean Cross
6f25a0d8a1 csr: use external csr_readl()/csr_writel() if present 
If the variable CSR_ACCESSORS_DEFINED is set, then use external
csr_readl() and csr_writel() instead of locally-generated inline
functions.

With this patch, csr.h can be used with etherbone.h and litex_server to
prototype drivers remotely.

Signed-off-by: Sean Cross <sean@xobs.io>
 2018-09-22 16:55:09 +02:00
Sean Cross
9a252e367c csr: use readl()/writel() accessors for accessing mmio 
Instead of directly dereferencing pointers, use variants on readl()/writel().
This way we can replace these functions with others for remote access
when writing drivers and code outside of the litex environment.

Signed-off-by: Sean Cross <sean@xobs.io>
 2018-09-22 16:54:46 +02:00
William D. Jones
9d4da737ff libbase/crt0-lm32.S: Add provisions for loading .data from flash. 
:100644 100644 e0cd7153 34428845 M	litex/soc/software/libbase/crt0-lm32.S
 2018-09-21 10:23:14 -04:00
Florent Kermarrec
9c6f76f18c bios/sdram: mode sdhw() 2018-09-13 06:33:54 +02:00
Florent Kermarrec
a44bedd557 bios/sdram: add missing #ifdef 2018-09-13 06:30:37 +02:00
Florent Kermarrec
1468b9f3ba bios/sdram: show all read scans when failing. 2018-09-13 05:26:51 +02:00
Florent Kermarrec
2b786065b1 targets: pass endianness to LiteEThMAC, tftp working with RISC-V, still need to fix txlen 2018-09-07 10:37:15 +02:00
Jean-François Nguyen
26963d62fa libnet/microudp: (WIP) fix endianness issues 2018-09-06 18:43:55 +02:00
Jean-François Nguyen
22c0131324 fix typo and unused include 2018-09-06 17:07:14 +02:00
Jean-François Nguyen
8f377307d8 add Minerva support 2018-09-05 22:33:04 +02:00
William D. Jones
ed507d618d Add lm32 "lite" variant, remove mult/div from "minimal" and update compiler flags accordingly. 2018-09-03 19:48:19 -04:00
Tim Ansell
ff908e404f
Merge pull request #92 from cr1901/l2-gate 
software/bios: Gate flush_l2_cache() if L2 Cache isn't present.
 2018-08-23 13:15:49 +10:00
William D. Jones
3146109af3 software/bios: Gate flush_l2_cache() if L2 Cache isn't present. 2018-08-22 23:03:08 -04:00
Florent Kermarrec
759e7d4dc3 bios/sdram: improve/simplify read window selection 
Compute a score for each window and select the best
 2018-08-22 23:15:32 +02:00
Florent Kermarrec
077f939169 Vexriscv: update csr-defs.h 2018-08-18 14:15:43 +02:00
Florent Kermarrec
9547938527 bios/sdram: changes to ease manual read window selection 2018-08-18 13:45:22 +02:00
Florent Kermarrec
cb5b4ac468 bios/boot: flush all caches before running from ram 2018-08-16 19:47:43 +02:00
Florent Kermarrec
1610a7f3fb bios/sdram: fix read_level_scan result 2018-08-14 18:33:36 +02:00
Florent Kermarrec
22f645adc1 bios/main: use edata instead of erodata 2018-08-07 09:02:09 +02:00
Florent Kermarrec
0429ee9f8f soc/software/bios: add reboot command 2018-08-06 12:23:50 +02:00
Florent Kermarrec
df7e5dbcf6 bios/sdram: add ERR_DDRPH_BITSLIP constant and some cleanup 2018-07-19 12:52:00 +02:00
Florent Kermarrec
85308672d3 software/bios/linker: revert data section since required by RISC-V compiler 2018-07-18 09:30:14 +02:00
Florent Kermarrec
4f1274e6a6 bios/sdram: improve bitslip selection when window can't be optimal (not enough taps for a full window) 2018-07-16 09:42:09 +02:00
Florent Kermarrec
f9104b201a bios/sdram: improve read leveling (artix7 read-leveling is now done automatically at startup) 2018-07-06 19:22:33 +02:00
Florent Kermarrec
c84e189d6a bios/sdram: fix compilation with no write leveling 2018-07-06 16:22:49 +02:00
Florent Kermarrec
df99cc66e8 bios/sdram: also check for last read of scan to choose optimal window 2018-07-02 14:12:27 +02:00
Florent Kermarrec
8ce7fcb237 bios/main: add cpu frequency to banner 2018-07-02 13:47:18 +02:00
Florent Kermarrec
477d224921 bios/sdram: check for optimal read window before doing read leveling, increment bitslip if not optimal. 2018-07-02 13:46:48 +02:00
Florent Kermarrec
d58eb4ecb7 bios/sdram: use new phy, improve scan, allow disabling high skew 2018-06-28 18:43:48 +02:00
Florent Kermarrec
692cb14245 software/bios: fix picorv32 boot_helper 2018-06-28 11:42:43 +02:00
Florent Kermarrec
b5ee110e63 bios/sdram: add write/read leveling scans 2018-06-27 15:31:54 +02:00
Sean Cross
7444992999 soc: bios: fix windows build 
The BIOS builds just fine on Windows, but afterwards tries to run
`chmod`.  This command does not exist on Windows, and is unnecessary.

Add a conditional guard to prevent this command from running on Windows.

Signed-off-by: Sean Cross <sean@xobs.io>
 2018-06-18 17:13:54 +08:00
bunnie
7353197e21 fix the vexriscv boot helper 2018-05-31 01:24:22 +08:00
Dolu1990
66229c8c05 add VexRiscv support (imported/adapted from misoc) 2018-05-09 15:03:37 +02:00
Florent Kermarrec
d149f386c9 allow multiple riscv32 softcores (use picorv32 cpu_type instead of riscv32) 2018-05-09 13:26:55 +02:00
Florent Kermarrec
4324c6f666 bios/sdram: update kuddrphy initialization procedure 2018-03-08 13:54:30 +01:00
Florent Kermarrec
90dcd45f0b soc/software/main: go to new line at startup 2018-03-07 21:39:10 +01:00
Florent Kermarrec
6706b24167 software/bios/main: add missing space 2018-03-07 15:24:39 +01:00
enjoy-digital
7b5bd4041a
Merge pull request #57 from rohitk-singh/master 
WIP - BIOS: Flashboot without main ram
 2018-02-10 21:37:38 +01:00
Florent Kermarrec
4f2725809e software/common: revert PYTHON to python3 (since breaking things) 2018-01-23 10:39:13 +01:00
Florent Kermarrec
4e168221d8 bios: fix riscv processor print 2018-01-23 10:33:05 +01:00
Florent Kermarrec
67f8718b26 minor cleanup 2018-01-23 00:35:20 +01:00
Sergiusz Bazanski
6daf3eabc5 Implement IRQ software support for RISC-V. 
Well, at least PicoRV32-specific. Turns out there is no RISC-V
specification for simple microcontroller-like interrupts, so PicoRV32
implements its' own based on custom opcodes.

It's somewhat esoteric, and for example doesn't offer a global interrupt
enable/disable. For this we implement a thin wrapper in assembly and
then expose it via a few helpers in irq.h.
 2018-01-22 18:50:26 +00:00
Sergiusz Bazanski
2108c97b9b Import PicoRV32-specific instruction macros. 
These come from the PicoRV32 repo and are released under the public
domain [1].

[1] - 70f3c33ac8/firmware/custom_ops.S
 2018-01-22 18:50:26 +00:00
Sergiusz Bazanski
75e230aae7 Replace __riscv__ macros with __riscv. 
The __riscv__ form is deprecated [1].

[1] - https://github.com/riscv/riscv-toolchain-conventions#cc-preprocessor-definitions
 2018-01-22 18:50:26 +00:00
Ewen McNeill
75e7f9505a BIOS: Flashboot without main ram 
Modified flashboot() to skip copy to main ram if there is no main
ram, and instead execute in place out of SPI flash.  (For this to
work the linker .ld will also need to redirect references to be
inside the SPI flash mapping.)
 2018-01-20 15:05:47 +11:00
Florent Kermarrec
3a5f93db5d software/bios: add litex logo 2018-01-19 18:41:13 +01:00
Tim Ansell
fcc22350fb
Merge pull request #52 from ewen-naos-nz/tftp-alt-port 
BIOS: Support alternate TFTP server port
 2018-01-18 13:40:28 +11:00
Ewen McNeill
5ce8ca8e9b BIOS: TFTP: try UDP/69 if specified port fails 2018-01-18 13:10:28 +11:00
Ewen McNeill
cb31266500 BIOS: set TFTP_SERVER_PORT from enviroment 2018-01-18 13:09:34 +11:00
Ewen McNeill
97f381baa6 BIOS: allow BIOS to specify TFTP server port 
Swaps hard coded PORT_OUT in tftp.c for parameter on the tftp_get()
and tftp_put() functions.  Allow TFTP_SERVER_PORT used by BIOS to be
set at compile time from compiler defines.
 2018-01-18 12:03:35 +11:00
Felix Held
21ad435def Include the ethernet related header files conditionally 
Only including those header files in the litex firmware is the first step to
move the firmware parts of liteeth to the liteeth tree.
 2018-01-16 14:33:49 +11:00
Chris Ballance
782711e5a9 bios/sdram: make read leveling robust for KUS SDRAM 
Increases the initial delay step into the valid read window as
with the original delay I was not getting out of the noisy
transition window, as evidenced by seeing read delay windows
of only 8 LSB ~10% of the time, leading to failing memory
tests
 2018-01-12 19:23:08 +01:00
Florent Kermarrec
5681a3c1a9 bios/sdram: revert capability to do manual read leveling since still needed with some targets 2018-01-08 12:04:33 +01:00
Florent Kermarrec
03eb137449 bios/sdram: fix data error reporting 2018-01-08 11:43:49 +01:00
Florent Kermarrec
22ff745027 bump year 2018-01-08 11:43:13 +01:00
Greg Darke
bbd15ca567 Wait longer before giving up on the 2nd tftp block. 
Previously we would wait the same number of iterations as it took us to
receive the first data block after sending the request. When using the
build in tftp server in qemu, the first wait loop succeeds (and thus
breaks when 'i' is still 0.

Since the counter was never reset between the first and second data
block, under qemu the tftp_get call would fail before ever checking if
we have received the second block of data.

Now that we initialise 'i' to 12M, we ensure that we wait the same
amount of time for the second data block as it previously did for the
third (and subsequent) blocks.
 2017-12-29 23:56:32 +01:00
Florent Kermarrec
0a2d38ecd2 bios/sdram: use same initialization procedure for artix7 than kintex7 excepting write leveling that is not done 2017-12-29 17:13:58 +01:00
Florent Kermarrec
c3d902ef42 soc/software/bios/sdram: add Kintex Ultrascale support 2017-11-08 12:59:38 +01:00
Tim 'mithro' Ansell
279ec488e3 bios: Print location jumping too. 
Makes it easier to  understand what is happening (and that the BIOS is
jumping to the right place).
 2017-10-06 20:38:44 +11:00
Tim 'mithro' Ansell
8152673d18 common: Compile with debugging symbols on. 
Debugging symbols are useful when using GDB :-)
 2017-10-06 20:38:44 +11:00
Tim 'mithro' Ansell
b1b6a74170 or1k: Use EXCEPTION_STACK_SIZE of 256bytes. 
or1k defines a 128 byte "red zone" after the stack that can not be
touched by the exception handler.

We also need 128 bytes to store the 32 registers.
 2017-10-06 20:38:44 +11:00
Tim 'mithro' Ansell
07a9df3586 bios: Declare dependency on linked in .a files. 2017-10-06 20:38:44 +11:00
Florent Kermarrec
8f3dcf90ab soc/software/bios/sdram: add optional memtest debug traces 2017-08-18 09:42:27 +02:00
Florent Kermarrec
4d664730fe soc/software/libbase: fix get_ident 2017-06-28 18:10:56 +02:00
Florent Kermarrec
455cb3ebe3 soc/software/main: fix double serialboot (merge issue) 2017-01-17 04:37:18 +01:00
Florent Kermarrec
ff31959aea merge most of misoc 54e1ef82 and migen e93d0601 changes 2017-01-13 03:55:00 +01:00
Joel Addison
31dbd35c2e Add strcasecmp function to lib 2017-01-12 14:00:05 +11:00
Tim 'mithro' Ansell
284c94f1d3 Fix Makefile dependency inclusion for other software. 2016-12-19 14:29:33 +01:00
Tim 'mithro' Ansell
8bccd2d988 bios: Include dependency rebuild info. 2016-12-17 14:14:14 +01:00
Tim 'mithro' Ansell
46bbec5494 main.o is not a phony target. 2016-12-15 19:56:58 +01:00
Florent Kermarrec
daa9473809 soc/software/bios/main: revision command becomes ident 2016-11-30 15:45:06 +01:00
Florent Kermarrec
0f57451f30 soc/software/bios: remove dataflow 2016-11-30 15:44:30 +01:00
enjoy-digital
7bb2be41e8 Merge pull request #9 from mithro/vprintf-fix 
libbase: Adding missing vprintf function.
 2016-10-30 09:43:43 +01:00
Tim 'mithro' Ansell
548fd33d20 libbase: Adding missing vprintf function. 
Fixes #8.

```
int vprintf(const char *format, va_list ap);

The functions vprintf(), vfprintf(), vsprintf(), vsnprintf() are equivalent to
the functions printf(), fprintf(), sprintf(), snprintf(), respectively, except
that  they  are  called  with  a  va_list instead of a variable number of
arguments.
```
 2016-10-30 16:25:06 +11:00
Tim 'mithro' Ansell
35ba9cf735 soc/software/Makefile: Fix Makefile depend generation. 
Previously the flags were not actually set and the *.d files were never
actually generated.
 2016-10-28 01:25:47 +11:00
Florent Kermarrec
44d766c09f software/sdram: cleanup artix7 init 2016-04-29 15:55:10 +02:00
Florent Kermarrec
66362b1280 move sdram code to litedram (https://github.com/enjoy-digital/litedram) 2016-04-29 07:45:15 +02:00
Florent Kermarrec
4e451a78d6 soc/software/bios/sdram: add sdrlevel_artix7 (bitslip and delays have to be found manually) 2016-04-27 12:33:44 +02:00
Florent Kermarrec
849434c1bd soc/software/bios: show cpu on first banner line 2016-04-19 09:19:37 +02:00
Tim 'mithro' Ansell
8998ae5c92 bios: Print CPU architecture on boot. 2016-04-19 16:02:26 +10:00
enjoy-digital
e0e56e3655 Merge pull request #1 from mithro/master 
Bunch of small fixes
 2016-04-19 07:49:24 +02:00
Tim 'mithro' Ansell
514496d744 libcompiler_rt: Fixing Makefile for CPU endianness. 2016-04-19 14:55:01 +10:00
Tim 'mithro' Ansell
2f834d0aa2 bios: Use single characters for boot modes. 
* The function keys never really worked properly.
 * Also add commands for the ROM/Flash/etc.
 2016-04-19 13:42:56 +10:00
Florent Kermarrec
fcd8d792a1 Merge branch 'master' of https://github.com/enjoy-digital/litex 2016-04-13 01:19:21 +02:00
Florent Kermarrec
40eb779e67 software/include/base: fix system.h for or1k 2016-04-10 17:21:54 +02:00
Florent Kermarrec
238d69f186 software/common: use -std=gnu99 for GCC 2016-04-10 17:21:17 +02:00
Florent Kermarrec
8ced064160 soc/software/libcompiler_rt: fix mulsi3 compilation 2016-04-07 08:28:38 +02:00
Florent Kermarrec
80d78698e3 soc/software/libnet/microudp: fix debug flag 2016-04-07 08:28:38 +02:00
Florent Kermarrec
454d5d13e2 soc/software: fix libcompiler_rt mulsi3.c compile 2016-04-04 08:36:23 +02:00
Florent Kermarrec
17f6cb1f17 initial RISC-V support (with picorv32), still some software to do (manage IRQ, L2 cache flush) 2016-04-01 00:09:17 +02:00
Florent Kermarrec
7e62cdf601 soc/software/bios: update default ip addresses (local: 192.168.1.50 / remote: 192.168.1.100) 2016-03-31 10:55:11 +02:00
Florent Kermarrec
2c32791a28 soc/software/bios/main: add capability to configure TEST_USER_ABORT_DELAY 2016-01-14 16:53:04 +01:00
Florent Kermarrec
492f276247 soc/software/bios/main: give priority to romboot over serialboot/netboot 2016-01-14 16:46:42 +01:00
Florent Kermarrec
3191533889 soc/software/libnet: add debug defines on microudp 2015-12-07 12:03:36 +01:00
Florent Kermarrec
6f4dd14ffa soc/software/boot: add #ifndef on LOCALIP and REMOTEIP to allow definition in the SoC with add_constant 2015-11-23 11:08:04 +01:00
Florent Kermarrec
714a3d88e2 add LICENSE, update copyrights, add Migen install instructions 2015-11-11 13:22:39 +01:00
Florent Kermarrec
bda196fbc8 soc/software/bios/sdram: split memtest and allow external #define of memtest sizes 2015-11-11 13:10:03 +01:00
Florent Kermarrec
3f43a49382 soc: merge with misoc 3fcc4f116c3292020cb811d179e45ae45990101b 
changes:
-software/bios: remove dataflow
-cores/identifier: replace with user-defined string
-interconnect/CSRBankArray: support read-only mappings
-targets: Added Numato Mimas V2 target
-Our libunwind changes were merged upstream.
-wishbone: update TODO
-replace Counter in Converters
-Fix CSRBankArray
-flterm: properly exit on ^C.
 2015-11-10 16:51:51 +01:00
Florent Kermarrec
3297210e48 boards/targets/sim: get SDRAM working in simulation with sdram/model 2015-11-10 12:57:23 +01:00
Florent Kermarrec
4afe4a07e4 soc/software: remove memtest (should be re-written) 2015-11-10 12:22:08 +01:00
Florent Kermarrec
6764c06b62 soc/sofware: remove libdyld 2015-11-10 12:21:23 +01:00
Florent Kermarrec
f72e172ac3 soc/software: remove libunwind 2015-11-10 12:16:34 +01:00
Florent Kermarrec
6a0f85dc42 litex: reorganize things, first work working version 2015-11-07 17:48:55 +01:00