c77da3a8bc
RFC: json2dts: set CPU clock-frequency and SoC bus-frequency
...
FIXME: timebase-frequency isn't to be used as the raw CPU clock, so
on vexriscv we might want to re-evaluate also setting *that* to the
`CONFIG_CLOCK_FREQUENCY`. Decide whether to keep the SoC's
`bus-frequency` cell, or whether to go with the CPU's `clock-frequency`
only.
2020-10-01 06:59:45 -04:00
b84a858b2c
CHANGES: initialize changes since last release.
2020-10-01 11:46:43 +02:00
ba2ff8cf71
tools/litex_sim: update get_sdram_phy_settings (rd/wrcmdphase no longer exposed as PhySettings).
2020-10-01 11:27:33 +02:00
2b62802961
tools/litex_sim: minor review cleanup.
2020-10-01 10:36:37 +02:00
23e319732c
tools/litex_server: minor review cleanup.
2020-10-01 10:35:11 +02:00
e8c0360fa5
tools/{litex_sim, litex_server}.py: Minor clean-up ( #657 )
...
Enable litex_server debug and create function to add for litex_sim args.
2020-10-01 10:32:44 +02:00
29bff18e69
software/liblitedram: add SDRAM CL/CWL printf to BIOS.
2020-09-30 19:00:12 +02:00
f476b32ada
software/liblitedram: rename SDRAM_TEST_SIZE to MEMTEST_DATA_SIZE (since used in benchs to force test size).
2020-09-30 18:34:48 +02:00
f7e49cc23a
software/liblitedram: add SDRAM_TEST_SIZE (2MiB as previously defined in memtest).
2020-09-30 18:02:07 +02:00
fdf7981f40
software/libbase/memtest: remove size restriction and don't execute memspeed.
2020-09-30 17:49:51 +02:00
ed21c983cb
Merge branch 'master' of http://github.com/enjoy-digital/litex
2020-09-30 17:29:04 +02:00
c154f1cbb2
software/liblitedram: add support for dynamic read/write phase and add command to BIOS to force them.
2020-09-30 17:09:19 +02:00
6f136f9faa
Merge pull request #655 from betrusted-io/svd_memregion
...
add memory regions to soc.svd
2020-09-30 11:43:14 +02:00
96976941b4
Merge pull request #656 from kbeckmann/fix_sdram_leveling
...
Fix build issue where sdram_leveling is not found
2020-09-30 09:57:54 +02:00
39d144626b
Fix build issue where sdram_leveling is not found
...
4f76656
2020-09-29 22:49:41 +02:00
a9234a8793
software/liblitedram: allow cmd_delay adjustment even when enforced by the phy.
2020-09-29 16:02:21 +02:00
4f76656018
software/liblitedram: simplify vtc/hardware/software controls.
...
- move vtc control to sdram_software_control_on/off.
- remove sdram_calibration (duplicate of sdram_leveling).
- be sure to call sdram_software_control_on/off before all litedram bios commands.
2020-09-29 15:40:26 +02:00
e4555df095
tools/litex_server/pcie: enable pcie device if not already enabledd.
...
Avoid having to do it manually or through a driver.
2020-09-29 13:38:19 +02:00
bc5873f78c
tools/litex_server/pcie: allow passing pcie bar as reported by lspci.
...
ex:
$lspci
[...]
06:00.0 RF controller: Xilinx Corporation Device 7022 (rev 01)
sudo litex_server --pcie --pcie-bar=06:00.0
2020-09-29 13:10:05 +02:00
6d07f01f5b
tools/litex_client/RemoteClient: allow use without local csr.csv file.
...
In some case, we just want to access MMAP manually without having the csr.csv file:
wb = RemoteClient()
wb.open()
wb.read(0x40000000)
wb.close()
2020-09-29 13:01:44 +02:00
7b42992383
add <memoryRegions> outer tag to series of <memoryRegion> for future proofing
2020-09-29 14:11:55 +08:00
4a94bb78f6
add memory regions to soc.svd
...
svd2rust does not recognize memory regions, but we'd like to
make an access crate for Rust that does.
This patch adds memory regions to soc.svd using the "vendorExtensions"
tag, as specified in https://www.keil.com/pack/doc/cmsis/SVD/html/svd_Format_pg.html
The vendorExtensions is added as a block after the Peripherals level, and has a format
like this:
```xml
<memoryRegion>
<name>SRAM</name>
<baseAddress>0x10000000</baseAddress>
<size>0x00020000</size>
</memoryRegion>
<memoryRegion>
<name>VEXRISCV_DEBUG</name>
<baseAddress>0xEFFF0000</baseAddress>
<size>0x00000100</size>
</memoryRegion>
<memoryRegion>
<name>CSR</name>
<baseAddress>0xF0000000</baseAddress>
<size>0x00040000</size>
</memoryRegion>
```
2020-09-29 01:30:09 +08:00
a1c023b900
software/bios/cmds/cmd_litedram: enable sdram_software_control before sdram_mode_register_write.
2020-09-24 14:58:42 +02:00
90a2b80b6a
software/liblitedram/sdram_write_leveling_rst_cmd_delay: fix printf location (do it before taps is decremented).
2020-09-24 13:54:08 +02:00
7617a82fe6
targets/kcu105: create specific cd_eth for ethernet.
2020-09-24 10:27:48 +02:00
a3c616028e
software/liblitedram/sdram: fix cmd_delays -> dat_delays.
2020-09-23 19:43:28 +02:00
01528e643e
Merge pull request #652 from gsomlo/gls-sdcard-clocking
...
RFC: proper way to set sdcard clock?
2020-09-22 21:52:13 +02:00
8e7596d330
liblitesdcard/sdcard.c: ensure effective sdcard clock is <= requested
...
With the way the clock divider is currently calculated, it is
possible for the effective sdcard clock to end up *higher* than
the requested `clk_freq` value.
Calculate the divider starting with the `CONFIG_CLOCK_FREQUENCY/clk_freq`
ratio which is then rounded up to the nearest power-of-two, ensuring
that the resulting, effective clock frequency is <= to the requested
frequency.
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
2020-09-22 15:15:50 -04:00
ac32b92e9f
targets/kcu105: add etherbone.
2020-09-22 18:31:06 +02:00
a601415bf0
software/liblitedram: add functions/commands to reset and force cmd/dat write leveling delays.
...
Useful to investigate/speed-up new board support.
2020-09-21 19:53:34 +02:00
a39660fa99
software/liblitedram/sdram.c: fix typo.
2020-09-17 18:19:12 +02:00
a0d66dd60e
software/liblitesdcard/sdcard: move busy_wait in sdcard_wait_cmd_done (fixes sdcardboot being stuck since code refactoring) and reduce busy_wait value.
2020-09-17 10:52:21 +02:00
de4fc14cf9
software/bios/cmds/cmd_litsdcard: make sure all commands generate a report.
2020-09-17 10:41:49 +02:00
6c4abe2185
software/bios/cmds/cmd_liteeth: make sure all commands generate a report and improve it.
2020-09-17 09:10:58 +02:00
7d6818ab07
software/bios/command: avoid too much groups, reorganize a bit.
2020-09-17 09:07:36 +02:00
88ef2a330b
software/bios/cmds/cmd_litedram: rename spdread command to sdram_spd.
2020-09-16 22:48:32 +02:00
3380de4adf
software/bios/cmds/cmd_i2c: rename commands to i2c_xy.
2020-09-16 22:45:19 +02:00
79009f762d
software/bios/cmds/cmd_spiflash: rename commands to flash_xy.
2020-09-16 22:44:47 +02:00
cb55d7119c
software/bios/cmds/cmd_liteeth: rename commands to mdio_xy.
2020-09-16 22:39:56 +02:00
d5162a2a2b
software/bios/cmds: use _handler suffix on all cmds functions.
2020-09-16 22:37:46 +02:00
d4018b7ccf
software/bios/cmds/cmd_litesdcard: rename commands to sdcard_xy.
2020-09-16 22:32:27 +02:00
400bf13400
bios/cmds/cmd_mem: rename commands to mem_xy.
2020-09-16 22:25:33 +02:00
21cc7df2fa
software/bios/cmds/cmd_mem: remove debug cmds that shouldn't have been merged.
2020-09-16 21:18:37 +02:00
74fb086322
software/liblitedram: rename functions/commands and expose mode register write function to user.
2020-09-16 20:01:39 +02:00
dc087f948a
software/liblitedram/sdram: keep sdrwlon/sdrwloff private.
2020-09-16 11:56:39 +02:00
9c2975e8b4
software/liblitedram/sdram: remove low level manual controls of the DFI interface.
...
This was too low level and unused.
2020-09-16 11:22:15 +02:00
8a9d17c768
software/liblitedram/sdram.c: move sdrwl_delays definition to write_leveling section and add #ifdef on reinitialization.
2020-09-16 11:03:10 +02:00
f208a5db2c
Merge pull request #649 from gsomlo/gls-misc-fixup
...
misc. fixes for a few recent commits
2020-09-15 21:17:14 +02:00
9729d053eb
software/memtest: use "unsigned long" to represent pointers
2020-09-15 14:46:18 -04:00
6c838cedcd
libbase/sim_debug: wrap markers variables within appropriate #ifdef
2020-09-15 14:46:18 -04:00
Gabriel Somlo
Florent Kermarrec
Vamsi Vytla
Konrad Beckmann
bunnie