Sebastien Bourdeauducq
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0e00837f42
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asmicon: move slot time to timing settings
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2012-03-18 14:57:31 +01:00 |
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Sebastien Bourdeauducq
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b1eb919ad2
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asmicon: bank machine (untested)
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2012-03-18 00:12:03 +01:00 |
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Sebastien Bourdeauducq
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7c377880fa
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asmicon: refresher (untested)
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2012-03-15 20:29:26 +01:00 |
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Sebastien Bourdeauducq
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e3ef121440
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norflash: use new timeline API
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2012-03-15 20:26:04 +01:00 |
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Sebastien Bourdeauducq
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7b14e0bd05
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asmicon: skeleton
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2012-03-14 18:26:05 +01:00 |
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Sebastien Bourdeauducq
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8d4a42887e
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ddrphy: working on hardware, simulation a bit messed up
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2012-02-24 15:44:51 +01:00 |
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Sebastien Bourdeauducq
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baba267db6
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ddrphy: request wrdata_en/rddata_en at the same time as the command
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2012-02-24 15:14:58 +01:00 |
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Sebastien Bourdeauducq
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17b2588321
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ddrphy: reads OK, write data coming out 1/2 cycle too late
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2012-02-24 15:05:52 +01:00 |
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Sebastien Bourdeauducq
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a363eb4a36
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ddrphy: partly working
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2012-02-24 13:54:10 +01:00 |
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Sebastien Bourdeauducq
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3179a27d14
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dfii: set data mask
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2012-02-23 22:00:51 +01:00 |
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Sebastien Bourdeauducq
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92ac69bae3
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dfii: new design
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2012-02-23 21:21:07 +01:00 |
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Sebastien Bourdeauducq
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b3ca952a39
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s6ddrphy: read path OK in simulation
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2012-02-21 17:38:40 +01:00 |
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Sebastien Bourdeauducq
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b4e041ecf1
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s6ddrphy: write path OK in simulation
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2012-02-20 23:55:20 +01:00 |
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Sebastien Bourdeauducq
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ce51653381
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s6ddrphy: generate DQ/DQS/DM OE
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2012-02-20 16:13:56 +01:00 |
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Sebastien Bourdeauducq
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cbc3b7fa83
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s6ddrphy: DQ/DQS/DM SERDES
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2012-02-20 13:45:57 +01:00 |
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Sebastien Bourdeauducq
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4c1e18a9b5
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s6ddrphy: clock, address and command
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2012-02-19 20:49:56 +01:00 |
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Sebastien Bourdeauducq
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f35cd4a85b
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Prepare for new DDR PHY
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2012-02-19 18:43:42 +01:00 |
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Sebastien Bourdeauducq
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1e4e092a55
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bios: fix function prototypes
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2012-02-18 21:06:35 +01:00 |
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Sebastien Bourdeauducq
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026457a98c
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Send SDRAM initialization sequence and answer PHY read/write requests. Obstinately refuses to work, unfortunately.
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2012-02-18 18:12:14 +01:00 |
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Sebastien Bourdeauducq
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5bc840b9c1
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DFI injector (untested)
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2012-02-17 23:50:10 +01:00 |
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Sebastien Bourdeauducq
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c38de34a21
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bios: DDR initialization skeleton
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2012-02-17 18:47:04 +01:00 |
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Sebastien Bourdeauducq
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e5927e265f
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bios: add flash target using m1nor
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2012-02-17 18:16:29 +01:00 |
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Sebastien Bourdeauducq
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48ddbf0c85
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Add build Makefile and JTAG load script
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2012-02-17 18:09:48 +01:00 |
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Sebastien Bourdeauducq
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c387ce7ce5
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Map DDR PHY controls in CSR
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2012-02-17 17:34:59 +01:00 |
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Sebastien Bourdeauducq
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5d1dad583b
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Connect DDR PHY
Doesn't do much for the moment, just to check synthesis/P&R.
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2012-02-17 11:04:44 +01:00 |
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Sebastien Bourdeauducq
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cdd58e023b
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s6ddrphy: use single-ended DQS
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2012-02-17 10:53:58 +01:00 |
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Sebastien Bourdeauducq
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cc5e4ae710
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clkfx: remove
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2012-02-16 19:30:00 +01:00 |
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Sebastien Bourdeauducq
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204452b0d3
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m1crg: make clock feedback pin bidirectional
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2012-02-16 18:35:44 +01:00 |
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Sebastien Bourdeauducq
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f36a45edcb
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lm32: compatibility with the new instance API
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2012-02-16 18:35:22 +01:00 |
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Sebastien Bourdeauducq
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72f9af9d90
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Generate all clocks for the DDR PHY
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2012-02-16 18:02:37 +01:00 |
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Sebastien Bourdeauducq
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859c9d8849
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Use new bus API
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2012-02-15 16:55:13 +01:00 |
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Sebastien Bourdeauducq
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1368b666df
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s6ddrphy: prepare quilt
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2012-02-14 15:52:39 +01:00 |
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Sebastien Bourdeauducq
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b157d84434
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README
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2012-02-14 15:43:09 +01:00 |
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Sebastien Bourdeauducq
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aef2e4b5e8
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Use double quotes for all strings
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2012-02-14 13:15:00 +01:00 |
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Sebastien Bourdeauducq
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5165ff7ec3
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Include Wishbone to ASMI bridge
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2012-02-13 23:12:57 +01:00 |
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Sebastien Bourdeauducq
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0654bf4583
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tools: use install and /usr/local (as suggested by David Kuehling)
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2012-02-08 15:09:07 +01:00 |
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Sebastien Bourdeauducq
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bfd2bf4ed3
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tools: remove bin2hex
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2012-02-08 15:08:03 +01:00 |
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Sebastien Bourdeauducq
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755079d7fa
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libbase: blocking UART write if IRQs are enabled
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2012-02-07 15:12:27 +01:00 |
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Sebastien Bourdeauducq
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73fce59631
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software: shell from original BIOS
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2012-02-07 15:02:44 +01:00 |
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Sebastien Bourdeauducq
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ef0667d959
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software: UART RX demo
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2012-02-07 14:12:33 +01:00 |
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Sebastien Bourdeauducq
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506ffab11a
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uart: RX support
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2012-02-07 14:12:23 +01:00 |
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Sebastien Bourdeauducq
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fb22edc06a
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software: enable -Wmissing-prototypes
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2012-02-07 13:02:06 +01:00 |
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Sebastien Bourdeauducq
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63f6dece56
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software: use the Clang/LLVM compiler
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2012-02-07 12:52:34 +01:00 |
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Sebastien Bourdeauducq
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a40b0ea175
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software: fix size_t and ptrdiff_t
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2012-02-07 12:06:49 +01:00 |
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Sebastien Bourdeauducq
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494c383fa8
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software: remove unnecessary IRQ acks
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2012-02-07 00:07:25 +01:00 |
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Sebastien Bourdeauducq
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b6b1901bb8
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LM32: make IP read-only and interrupt lines level-sensitive
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2012-02-07 00:07:12 +01:00 |
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Sebastien Bourdeauducq
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4aaf48afb0
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software: interrupt driven UART working
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2012-02-06 23:53:29 +01:00 |
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Sebastien Bourdeauducq
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58f4f78d2c
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sram: fix sub-word write
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2012-02-06 23:13:35 +01:00 |
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Sebastien Bourdeauducq
|
5cde57cb65
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software: use new UART
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2012-02-06 17:53:41 +01:00 |
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Sebastien Bourdeauducq
|
33f1c456bf
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top: connect UART IRQ
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2012-02-06 17:45:40 +01:00 |