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Author	SHA1	Message	Date
Florent Kermarrec	5e8a0c496d	gensoc: add mem_map and mem_decoder to avoid duplications	2015-02-26 20:12:27 +01:00
Florent Kermarrec	5ac5ffe359	gensoc: get platform_id from platform	2015-02-26 19:07:19 +01:00
Florent Kermarrec	554731ae44	targets/simple: make it generic (no default_platform, use platform's default_clk_name/default_clk_period)	2015-02-26 13:08:15 +01:00
Florent Kermarrec	02b3f51382	liteeth: fix example_designs generation	2015-02-26 10:23:38 +01:00
Florent Kermarrec	00862a383c	liteeth: fix import (from liteeth --> from misoclib.liteeth)	2015-02-26 09:48:37 +01:00
Florent Kermarrec	60effe1d95	move files to liteeeth and create example_designs directory	2015-02-26 09:35:14 +01:00
Sebastien Bourdeauducq	0267868cbe	remove litex submodule	2015-02-25 10:40:44 -07:00
Sebastien Bourdeauducq	658cb0e405	merge liteeth	2015-02-25 10:35:39 -07:00
Sebastien Bourdeauducq	8015d12692	move files for misoc integration	2015-02-25 10:34:11 -07:00
Florent Kermarrec	eef679b6d4	phy/sim: generate sop/eop	2015-02-25 17:47:44 +01:00
Florent Kermarrec	a559fc77c8	remove upload optimization (we will use wishbone later for performance)	2015-02-24 18:01:04 +01:00
Florent Kermarrec	6b7026f521	add sim phy	2015-02-24 01:42:56 +01:00
Florent Kermarrec	b6ebcece95	add read grouping to etherbone, we now have interesting upload speeds... :)	2015-02-23 18:58:31 +01:00
Florent Kermarrec	ac5b7c073a	test: add make.py to replace static config.py file	2015-02-23 18:55:19 +01:00
Florent Kermarrec	71f3a5bf13	prepare reads grouping to speed up upload	2015-02-23 18:11:08 +01:00
Florent Kermarrec	e309ba55ea	use new Migen sel signal to change the way we upload data (will enable fifo bursts)	2015-02-23 12:34:04 +01:00
Florent Kermarrec	d3486dba91	rle: increase dw automatically when needed	2015-02-23 09:41:18 +01:00
Florent Kermarrec	2a2c3af380	host/dump: optimize get_bits / decode_rle since we can now have large dumps	2015-02-23 02:14:20 +01:00
Florent Kermarrec	861c54760e	host/driver/reg: use burst mode to speed up upload of data (useful with Etherbone)	2015-02-23 00:49:59 +01:00
Florent Kermarrec	282c9b9426	test: add make.py to replace static config.py file	2015-02-23 00:21:12 +01:00
Florent Kermarrec	b1dee774cd	tty working	2015-02-22 15:23:55 +01:00
Florent Kermarrec	2fa28c1b5d	mac: add padding	2015-02-22 13:56:06 +01:00
Florent Kermarrec	a802a5c535	remove MiSoC dependency	2015-02-21 23:50:25 +01:00
Florent Kermarrec	a2370388fb	doc: remove IP	2015-02-21 23:34:30 +01:00
Florent Kermarrec	15240912c9	doc: remove IP	2015-02-21 23:34:08 +01:00
Florent Kermarrec	ea7962da12	doc: remove IP	2015-02-21 23:33:49 +01:00
Florent Kermarrec	acdf511bd1	doc: remove IP	2015-02-21 23:33:21 +01:00
Florent Kermarrec	7837580020	add ft2232h software code (will need rework)	2015-02-21 23:19:10 +01:00
Florent Kermarrec	b59c777cab	add ft2232h hdl code (will need rework)	2015-02-21 23:13:43 +01:00
Florent Kermarrec	1b0bc5ca44	init repo structure	2015-02-21 23:06:36 +01:00
Florent Kermarrec	4bdb1ffda2	add README skeleton	2015-02-21 22:58:42 +01:00
Florent Kermarrec	65294a5577	add tty over udp (will need mac to insert padding)	2015-02-21 21:26:52 +01:00
Florent Kermarrec	0a9043b6c1	remove MiSoC dependency	2015-02-21 19:34:14 +01:00
Florent Kermarrec	52f5955dca	remove MiSoC dependency	2015-02-21 19:29:26 +01:00
Florent Kermarrec	741ecca5b4	la: fix intput_buffer clocking when clk_domain is not "sys"	2015-02-19 11:41:54 +01:00
Florent Kermarrec	37e463da9a	fix rle when used with subsampler	2015-02-19 11:34:20 +01:00
Florent Kermarrec	e495e2f537	driver/la: add samplerate computation (required by sigrok export)	2015-02-19 11:16:32 +01:00
Florent Kermarrec	8e0553670a	remove limitation on debug tuple definition	2015-02-19 10:52:57 +01:00
Florent Kermarrec	5f19955825	rle: expose length parameter to user, add assertion on dw to encode counter and automatically increase dw in rle mode	2015-02-19 10:42:13 +01:00
Florent Kermarrec	5fb6beb473	enable RLE only in POST_HIT_RECORDING state (to ensure programmed offset is respected)	2015-02-19 10:26:34 +01:00
Florent Kermarrec	788652c6f8	simplify RLE	2015-02-19 01:43:04 +01:00
Florent Kermarrec	87f29a307a	fix typo	2015-02-18 23:35:50 +01:00
Florent Kermarrec	3680b48216	dump/sigrok: fix against real dumps, now able to import and export	2015-02-18 21:45:36 +01:00
Florent Kermarrec	6db831e5a8	update LiteX	2015-02-18 11:39:22 -07:00
Florent Kermarrec	73ab271f9a	targets/kc705: fix csr address conflict on eth	2015-02-18 10:45:18 -07:00
Florent Kermarrec	0a38b8c74a	add LiteX external core and remove ethmac	2015-02-18 10:43:44 -07:00
Florent Kermarrec	9ebb8f8022	remove verilog and move mxcrg.v to misoclib/mxcrg	2015-02-18 10:40:30 -07:00
Florent Kermarrec	5500c41915	move lm32/mor1kx submodules to extcores	2015-02-18 10:39:18 -07:00
Florent Kermarrec	4c9554b65c	gensoc: call do_exit after SoC is built	2015-02-18 10:38:14 -07:00
Florent Kermarrec	9326985e05	update LiteScope	2015-02-18 16:53:02 +01:00