Florent Kermarrec
e5de4b356a
interconnect/axi/axi_lite: Add prot signal.
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Not directly used by LiteX but useful for wrapping AXI-Lite RTL code.
2022-09-08 12:06:35 +02:00
Florent Kermarrec
3b714c8145
test: Add minimal test_axi_stream test (Just syntax check for now).
2022-09-08 11:53:05 +02:00
Florent Kermarrec
afc89c9350
interconnect/axi/axi_stream: Add ID/Dest support and minor cleanup.
2022-09-08 11:51:55 +02:00
Florent Kermarrec
5b8d3651a9
software/liblitedram: Enable ECP5DDRPHY features on GW2DDRPHY (since very similar).
2022-09-07 16:27:54 +02:00
Florent Kermarrec
ee536f9cd5
CONTRIBUTORS: Update.
2022-09-07 10:13:17 +02:00
Florent Kermarrec
85e8aab5ae
tools/litex_contributors: Sort contributors by names.
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The git .csv generation is already sorted but this needs to be sorted again due
to the companies renaming.
2022-09-07 10:07:12 +02:00
Florent Kermarrec
0bd19fd026
tools/litex_contributors: Rename authors to contributors.
2022-09-07 09:49:26 +02:00
Florent Kermarrec
0144612751
tools/litex_contributors: Add RapidSilicon to companies.
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RapidSilicon is helping funding the improvement/development of LiteX features
and the team also contribute directly to the project.
2022-09-07 09:48:27 +02:00
Florent Kermarrec
4d6813ae64
tools/litex_contributors: Sort years.
2022-09-07 09:42:20 +02:00
Florent Kermarrec
a6acfb9a37
stream/Buffer: Integrate PipeValid/PipeReady (both configurable) and add tests.
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Allow selecting pipelining of valid/data or/and ready and creating a full Skid Buffer
(Pipeline of both valid/data and ready).
2022-09-07 08:59:37 +02:00
Dolu1990
ce90181046
cpu/VexRiscv_SMP add --wishbone-force-32b option
2022-09-06 13:13:45 +02:00
Dolu1990
af43e98e78
Merge branch 'naxriscv-merge'
2022-09-06 13:07:54 +02:00
Dolu1990
5fad94f9d6
cpu/VexRiscv_SMP add --wishbone-force-32b option
2022-09-06 11:23:36 +02:00
Florent Kermarrec
36297c7a1e
cores/video: Avoid serializer_attrs.
2022-09-05 09:49:15 +02:00
enjoy-digital
398811b910
Merge pull request #1413 from trabucayre/gowin_HDMI
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soc/cores/video: adding Gowin HDMI Phy
2022-09-05 09:32:29 +02:00
enjoy-digital
8159b5caad
Merge pull request #1412 from umarcor/umarcor/f4pga
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litex/build/xilinx/f4pga: update imports
2022-09-02 19:03:02 +02:00
Gwenhael Goavec-Merou
a9c7e868e7
soc/cores/video: adding Gowin HDMI Phy
2022-09-02 19:00:33 +02:00
umarcor
7f17866386
litex/build/xilinx/f4pga: update imports
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Signed-off-by: umarcor <umartinezcorral@antmicro.com>
2022-09-02 15:48:22 +02:00
Florent Kermarrec
153182a014
cores/dna: Fix typo.
2022-09-02 13:09:40 +02:00
Florent Kermarrec
4426e61899
soc/add_pcie: Expose with_synchronizer parameter.
2022-09-01 17:47:27 +02:00
Florent Kermarrec
b24d744f8e
cores/dna: Rewrite/simplify core and use a slower clock (sys_clk/16).
2022-09-01 14:24:01 +02:00
Florent Kermarrec
1c4d64f46b
CHANGES: Update.
2022-09-01 11:22:25 +02:00
Florent Kermarrec
c0d3775dcd
integration/builder: Simplify bios_console.
2022-08-31 12:10:15 +02:00
Florent Kermarrec
aec02b395d
integration/builder: Add default bios_console value.
2022-08-31 10:33:26 +02:00
Florent Kermarrec
35afd59956
tools/litex_server/litex_client: Add initial information exchange and improve PCIe case.
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Due to the address translation done with the LitePCIe bridge (remapping CSR to 0), RemoteClient
needs to know which bridge is used to also translate CSRs.
This commit adds an initial information exchange between server and client and avoid the PCIe workarounds.
2022-08-30 18:54:03 +02:00
enjoy-digital
ea8ba57eab
Merge pull request #1410 from trabucayre/improve_connectors
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Improve connectors
2022-08-30 15:34:55 +02:00
Gwenhael Goavec-Merou
fc0f0be679
build/generic_platform/ConnectorManager: allows to search recursively pins through connectors dictionary
2022-08-29 20:27:41 +02:00
Gwenhael Goavec-Merou
d3368d7fab
build/generic_platform: allows to dynamically extends connectors dictionary
2022-08-29 20:25:39 +02:00
Florent Kermarrec
ece86a7673
integration/software: Remane BIOS console options/flags.
2022-08-29 19:47:08 +02:00
Florent Kermarrec
6f5412e9d0
bios/main: Change no console message display.
2022-08-29 19:31:41 +02:00
Florent Kermarrec
8b8dba658c
integration/builder: Rename exposed bios-console values.
2022-08-29 19:26:29 +02:00
Florent Kermarrec
f842481a2d
integration/builder: Rename --lto argument to --bios-lto and create BIOS group.
2022-08-29 19:01:55 +02:00
enjoy-digital
e2a3cd57bf
Merge pull request #1409 from cklarhorst/bios_no_console
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integration/builder: Make bios console configurable + add no console option
2022-08-29 18:51:31 +02:00
Christian Klarhorst
9e4df3c1d2
integration/builder Add no bios console option
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This allows to deactivate the cmd_handlers and the serial parsing code to reduce the bios size.
2022-08-29 10:55:39 +02:00
Christian Klarhorst
b010455415
integration/builder Make bios console configurable
2022-08-29 10:40:31 +02:00
enjoy-digital
50a5e137ff
Merge pull request #1405 from jrudolph/better-meson-error-msg
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soc/integration/builder: more precise error message when meson is too old
2022-08-24 19:36:23 +02:00
Johannes Rudolph
64e5de9fc8
soc/integration/builder: more precise error message when meson is too old
2022-08-23 19:02:41 +02:00
Gabriel Somlo
01754a82c8
integration/soc: fix sata irq initialization
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The first argument to `self.irq.add()` should match the name of the
`EventManager()` object being added, i.e., "sata_irq" rather than
just plain "sata". This is necessary for interrupt signals to be
asserted as intended.
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
2022-08-19 14:37:22 -04:00
Dolu1990
78a1dbbc8b
Merge pull request #1402 from enjoy-digital/naxriscv-merge
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cpu/NaxRiscv fix LSU deadlock
2022-08-18 17:32:16 +02:00
Dolu1990
89522f6980
cpu/NaxRiscv fix LSU deadlock
2022-08-18 10:36:19 +02:00
Tim 'mithro' Ansell
33ae301d0d
Merge pull request #1395 from lschuermann/dev/missing-cpus-manifest
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Add missing soc/cores/cpu directories to MANIFEST.in
2022-08-10 09:57:53 -07:00
Leon Schuermann
727cc40ab1
Add missing soc/cores/cpu directories to MANIFEST.in
2022-08-09 20:30:04 +02:00
Dolu1990
552d7bdb5c
cpu/NaxRiscv: update
2022-08-08 10:53:06 +02:00
Dolu1990
ec4c8741d4
cpu/NaxRiscv: update
2022-08-08 10:51:23 +02:00
enjoy-digital
c4e635ea5c
Merge pull request #1393 from trabucayre/fix_vivado_yosys_synth
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build/xilinx/vivado: Insert the yosys call into script_content only when synth_mode == yosys
2022-08-05 17:30:14 +02:00
Florent Kermarrec
b792bfd8b2
tools/litex_client/run_gui: Add Identifier/Leds/Buttons peripherals support.
2022-08-05 15:25:13 +02:00
Gwenhael Goavec-Merou
ae44b70833
build/xilinx/vivado: Insert the yosys call into script_content only when synth_mode == yosys
2022-08-05 14:51:39 +02:00
Florent Kermarrec
95a4814184
tools/litex_client: Improve run_gui termination.
2022-08-05 14:12:37 +02:00
Florent Kermarrec
68006a2144
tools/litex_client: Add XADC (7-Series) suppport to GUI.
2022-08-05 13:49:26 +02:00
Florent Kermarrec
ae8deda186
interconnect/axi/AXIArbiter: valid also needs to be filtered.
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Fixes un-sollicited valids on masters.
2022-08-05 11:20:52 +02:00