Sebastien Bourdeauducq
|
7c6ebcf753
|
examples/pytholite/uio: demonstrate memories
|
2012-11-23 16:24:20 +01:00 |
|
Sebastien Bourdeauducq
|
f3efd74dfd
|
uio: support memories
|
2012-11-23 16:23:24 +01:00 |
|
Sebastien Bourdeauducq
|
ab31b4d99c
|
bus: memory initiator
|
2012-11-23 16:22:50 +01:00 |
|
Sebastien Bourdeauducq
|
0b7dd7bdce
|
pytholite/io: fix Wishbone writes + support sel attribute
|
2012-11-23 13:40:46 +01:00 |
|
Sebastien Bourdeauducq
|
20d87682ad
|
examples/pytholite/uio: simulate and convert Pytholite
|
2012-11-23 13:10:40 +01:00 |
|
Sebastien Bourdeauducq
|
4c216d8f11
|
pytholite/io: support Wishbone reads
|
2012-11-23 13:09:55 +01:00 |
|
Sebastien Bourdeauducq
|
0b24a2ff36
|
pytholite/io: support Wishbone writes
|
2012-11-23 12:41:50 +01:00 |
|
Sebastien Bourdeauducq
|
f098c5c695
|
pytholite/compiler: pass keyword arguments to gen_io
|
2012-11-23 12:40:57 +01:00 |
|
Sebastien Bourdeauducq
|
51e2e6ecd0
|
fhdl/verilog: remove empty cases
|
2012-11-18 16:32:51 +01:00 |
|
Sebastien Bourdeauducq
|
89643bc434
|
sim/ipc/Message: convert values
|
2012-11-17 23:19:40 +01:00 |
|
Sebastien Bourdeauducq
|
e92af9de59
|
pytholite/transel: use python3-compatible comparison methods
|
2012-11-17 23:16:07 +01:00 |
|
Sebastien Bourdeauducq
|
6434ddd95a
|
examples/pytholite: add uio example
|
2012-11-17 22:26:14 +01:00 |
|
Sebastien Bourdeauducq
|
b6b4c5d70e
|
uio/ioo: fix UnifiedIOSimulation
|
2012-11-17 22:25:42 +01:00 |
|
Sebastien Bourdeauducq
|
1cabcb3c3f
|
uio: support generator trampolining in simulation
|
2012-11-17 19:59:22 +01:00 |
|
Sebastien Bourdeauducq
|
be68ecfc72
|
uio: add simulation I/O object
|
2012-11-17 19:55:33 +01:00 |
|
Sebastien Bourdeauducq
|
7add4c6f3c
|
uio: unified I/O object
|
2012-11-17 19:54:50 +01:00 |
|
Sebastien Bourdeauducq
|
d10df1a8ab
|
actorlib/sim: swap TokenExchanger parameters
|
2012-11-17 19:46:28 +01:00 |
|
Sebastien Bourdeauducq
|
d4baac6c0f
|
bus/csr: allow specifying existing interface
|
2012-11-17 19:44:25 +01:00 |
|
Sebastien Bourdeauducq
|
86090e1cbd
|
bus/asmibus: swap port position to be consistent with wishbone API
|
2012-11-17 19:42:39 +01:00 |
|
Sebastien Bourdeauducq
|
ece786d6aa
|
bus/wishbone: allow specifying existing interface
|
2012-11-17 19:42:06 +01:00 |
|
Sebastien Bourdeauducq
|
d0d4c48098
|
bus/transactions: add busname parameter
|
2012-11-17 19:36:08 +01:00 |
|
Sebastien Bourdeauducq
|
897a2e3f9c
|
actorlib/sim: split TokenExchanger
|
2012-11-17 14:15:51 +01:00 |
|
Sebastien Bourdeauducq
|
eb156af20c
|
pytholite/io: support token pull
|
2012-11-16 23:48:41 +01:00 |
|
Sebastien Bourdeauducq
|
748741b49a
|
examples/pytholite/basic: demonstrate conversion to Verilog
|
2012-11-16 19:38:57 +01:00 |
|
Sebastien Bourdeauducq
|
7c7addbbe8
|
examples: basic Pytholite demo
|
2012-11-16 19:34:34 +01:00 |
|
Sebastien Bourdeauducq
|
dd9a102a78
|
pytholite/io: support token push
|
2012-11-16 19:24:45 +01:00 |
|
Sebastien Bourdeauducq
|
bf5ce8dc20
|
pytholite: move expression and register handling to separate modules
|
2012-11-11 23:48:23 +01:00 |
|
Sebastien Bourdeauducq
|
f59fd69e34
|
pytholite/compiler: recognize composite I/O pattern
|
2012-11-11 18:03:16 +01:00 |
|
Sebastien Bourdeauducq
|
0b5652bb79
|
pytholite/compiler: visit_assign_special
|
2012-11-11 15:52:06 +01:00 |
|
Sebastien Bourdeauducq
|
687d18a150
|
pytholite: move FSM management to separate module
|
2012-11-11 14:30:25 +01:00 |
|
Sebastien Bourdeauducq
|
409a5570e4
|
pytholite/compiler: refactor visit_block
|
2012-11-11 14:17:52 +01:00 |
|
Sebastien Bourdeauducq
|
fb63698ef4
|
pytholite/compiler: clean up visit_statement
|
2012-11-10 23:30:14 +01:00 |
|
Sebastien Bourdeauducq
|
6ebd1e4503
|
pytholite: forward 'yield call' statements to io module
|
2012-11-10 22:59:14 +01:00 |
|
Sebastien Bourdeauducq
|
48acb1bcfd
|
pytholite: introduce io module
|
2012-11-10 21:51:19 +01:00 |
|
Sebastien Bourdeauducq
|
6776f06a42
|
pytholite/compiler: support bitslice
|
2012-11-10 18:04:05 +01:00 |
|
Sebastien Bourdeauducq
|
37f113c3ea
|
pytholite/compiler: support range(constants) in for loops
|
2012-11-10 15:26:13 +01:00 |
|
Sebastien Bourdeauducq
|
370bab1190
|
pytholite/compiler: cleanup print statements
|
2012-11-10 15:10:57 +01:00 |
|
Sebastien Bourdeauducq
|
39c7dc7d63
|
pytholite/compiler: support for loops (iterating on lists only)
|
2012-11-10 15:02:55 +01:00 |
|
Sebastien Bourdeauducq
|
93db3edd00
|
pytholite/compiler: support while loops
|
2012-11-10 14:37:33 +01:00 |
|
Sebastien Bourdeauducq
|
a901ef46ab
|
Revert "pytholite/compiler: SymbolStack"
This reverts commit f57da497b2.
|
2012-11-10 12:09:45 +01:00 |
|
Sebastien Bourdeauducq
|
f57da497b2
|
pytholite/compiler: SymbolStack
|
2012-11-09 23:02:16 +01:00 |
|
Sebastien Bourdeauducq
|
5750c7c07e
|
pytholite/compiler: improve naming of selection signals
|
2012-11-09 20:19:22 +01:00 |
|
Sebastien Bourdeauducq
|
4921a34616
|
pytholite/compiler: fix handling of constants
|
2012-11-09 20:17:57 +01:00 |
|
Sebastien Bourdeauducq
|
26cf1b8840
|
fhdl: make constants hashable
|
2012-11-09 20:17:43 +01:00 |
|
Sebastien Bourdeauducq
|
c1b8492b61
|
pytholite/compiler: go to next state
|
2012-11-09 20:12:15 +01:00 |
|
Sebastien Bourdeauducq
|
e1075a962c
|
pytholite/compiler: support if statements
|
2012-11-09 19:37:52 +01:00 |
|
Sebastien Bourdeauducq
|
92ff5095da
|
pytholite/compiler: support comparisons in expressions
|
2012-11-09 18:41:32 +01:00 |
|
Sebastien Bourdeauducq
|
a645e0b24e
|
pytholite/compiler: create FSM
|
2012-11-09 17:37:42 +01:00 |
|
Sebastien Bourdeauducq
|
7744655ef2
|
fhdl/visit: add missing self
|
2012-11-09 17:37:24 +01:00 |
|
Sebastien Bourdeauducq
|
13af0ce556
|
fhdl: visit module (untested)
|
2012-11-09 16:00:11 +01:00 |