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Author SHA1 Message Date
whitequark
a8cd3b9adc Remove useless includes pulled in by libunwind. 
These aren't used by libunwind in any configuration and
should be also removed in upstream.
 2015-07-26 13:12:23 +03:00
whitequark
f6639c1833 Add libunwind. 2015-07-26 12:59:18 +03:00
whitequark
24463a168a Add a stub getenv() implementation. 
This is not strictly necessary to build libunwind (it can
be built with -DNDEBUG), but it will be handy while it is
debugged.

It can be removed afterwards.
 2015-07-26 12:55:52 +03:00
whitequark
b2710e437c Add a stub pthread header. 
The header implements only the pthread rwlock interface, which
never actually locks.

This is necessary to build libunwind.
 2015-07-26 12:54:40 +03:00
whitequark
b5048f6cf1 Add headers for the dynamic linker interface. 
These are required for libunwind to discover
the exception frame headers.
 2015-07-26 12:53:18 +03:00
whitequark
7a9975ab5a Add a stub C++ standard library. 
This is necessary to build libunwind.
 2015-07-26 12:49:21 +03:00
whitequark
5502cec3da Add basic inttypes.h. 
This is taken from glibc. Only PRI* definitions are imported;
functions are not.
 2015-07-26 12:44:13 +03:00
whitequark
eef1aa77ef Mark abort() as __attribute__((noreturn)). 2015-07-26 12:43:22 +03:00
whitequark
10f719a830 Add support for fprintf(stderr, ...). 2015-07-26 12:42:53 +03:00
whitequark
f5cc6fb72d Don't use clang for anything except or1k. 2015-07-26 10:00:58 +03:00
whitequark
d03dabb460 common.mak: Pass -fexceptions to clang and clang++. 
This results in generation of .eh_frame sections. These sections
can be discarded during final linking, or included if exception
handling is desired. For exception handling to work, all sources
must be built with -fexceptions.
 2015-07-26 03:30:21 +03:00
whitequark
69c2a705bf common.mak: use clang/clang++ to compile C/C++ sources. 
Note that -integrated-as is not active by default on OR1K,
so we're still shelling out to binutils to assemble.
It is not yet possible to build everything using -integrated-as.
 2015-07-26 03:28:37 +03:00
whitequark
0f47876d2e common.mak: remove RANLIB. 
`ranlib` is not necessary on any system we can possibly build for,
as it is superseded by `ar s` for the last ten years or so (at least).
Thus, change ar invocations to `ar crs`, also removing a `l` flag
that is ignored by binutils.
 2015-07-26 03:20:23 +03:00
whitequark
f500b906e6 common.mak: remove AS. 
$(AS) was never used: $(assemble) invokes the C compiler instead.
In case of LLVM, this will allow us to consistently use the LLVM
internal assembler for both inline assembly in C and assembly
sources; so, avoid ever invoking binutils as explicitly.
 2015-07-26 02:46:03 +03:00
Florent Kermarrec
8d1c555e36 misoclib/com/uart: remove irq condition parameters and use "non-full" for tx irq, "non-empty" for rx irq. 
An optimal solution for both sync and async mode is not easy to implement, it would requires moving CDC out of UART module and handling in the PHY with AsyncFIFO or minimal depth.
For now use the solution that works for both cases. We'll try to optimize that if we have performance issues.
 2015-07-25 00:25:09 +02:00
Florent Kermarrec
ce11b30140 misoclib: integrate mxcrg.py in mlabs_video target, remove others directory 
we should also get rid of mxcrg.v (similar to what is done on papilio or pipstrello)
 2015-07-24 23:16:45 +02:00
Florent Kermarrec
b75b93df43 misoclib/com/uart: replace revered Migen FIFO function with specific _get_uart_fifo function for our use case. 2015-07-24 14:05:54 +02:00
Florent Kermarrec
0a115f609e litepcie/frontend/dma: group loop index and count in loop_status register (avoid 2 register reads) 2015-07-24 13:52:57 +02:00
Florent Kermarrec
d73d75007e misoclib/com/uart: cleanup and add irq condition parameters 
- reintroduce RX/TX split (ease comprehension)
- use FIFO wrapper function from Migen.
- add tx_irq_condition and rx_irq_condition
 2015-07-24 12:57:42 +02:00
Florent Kermarrec
b1ea3340f3 litepcie/frontend/dma: add loop counter (useful to detect missed interrupts) 2015-07-22 22:55:11 +02:00
Florent Kermarrec
dfc207aacb litepcie: use data instead of dat in dma_layout (allow use of migen.actorlib.packet modules on dma dataflow) 2015-07-22 21:44:53 +02:00
Florent Kermarrec
40740d3ddc litepcie: use optional platform.misoc_path to add litepcie phy wrapper verilog files 
We should eventually try to use python package_data or data_file for that.
 2015-07-22 18:09:04 +02:00
Sebastien Bourdeauducq
84514cf8d5 uart: remove option to refill HW from uart_write 2015-07-19 23:41:38 +02:00
Robert Jordens
a501d7c52d uart: support async phys 2015-07-19 23:37:00 +02:00
Robert Jordens
097248bce9 uart.c: rx overflow fix and tx simplification 
* fixes the clearing of the rx ringbuffer on rx-overflow
* removes tx_level and tx_cts by restricting the ringbuffer
  to at least one slot empty
* agnostic of the details of the tx irq: works for uarts that
  generate tx interrupts on !tx-full or on tx-empty.
* only rx_produce and tx_consume need to be volatile
 2015-07-19 23:37:00 +02:00
Florent Kermarrec
35250f5b11 bios: add romboot 
When firmware is small enough, it can be interesting to run code from an embedded blockram memory (faster and not impacted by memory controller activity).
It can also be a fallback option in case boot from flash failed.
To use this, define ROM_BOOT_ADDRESS and initialize the blockram with the firmware data.
 2015-07-14 18:01:44 +02:00
Florent Kermarrec
6c13879fb6 make.py: use sys.path.insert(0...) to allow external designs to have specific targets derived from a base target 2015-07-13 17:25:50 +02:00
Florent Kermarrec
4dca66b23d misoclib/video/dvisampler: add fifo_depth parameter 2015-07-13 11:03:33 +02:00
Florent Kermarrec
e6da1d16b2 wishbone2lasmi: fix "READ_DATA" state 2015-07-09 10:40:32 +02:00
Florent Kermarrec
d244eba583 tools/flterm.py: fix kernel-adr support 2015-07-07 14:58:49 +02:00
Florent Kermarrec
0545d49294 liteeth/core: add with_icmp parameter 2015-07-06 21:31:20 +02:00
Florent Kermarrec
e011f9378f use sets for leave_out 2015-07-05 22:49:23 +02:00
Florent Kermarrec
c100ef6406 liteeth/core/mac: adapt depth on AsyncFIFOs according to phy (reduce ressource usage with MII phy) 2015-07-05 22:45:53 +02:00
Florent Kermarrec
c1ca928ec2 liteeth: small logic optimizations on mac (eases timings on spartan6) 2015-07-05 12:31:52 +02:00
Florent Kermarrec
23541b5949 software/bios: call eth_mode only if we have an ethernet mac (we don't need to call it when we have a hardware UDP/IP stack) 2015-07-04 21:04:23 +02:00
Yann Sionneau
10eb07526d bios: show memtest command in help 2015-07-02 17:20:06 +02:00
Sebastien Bourdeauducq
31a447154d soc: support constants without value 2015-06-28 21:35:37 +02:00
Sebastien Bourdeauducq
e913fca8a0 libcompiler-rt: add fixdfdi 2015-06-27 23:51:09 +02:00
Joe Britton
a1e3fb16ac flterm.py: use serial_for_url 2015-06-26 11:40:33 +02:00
Florent Kermarrec
04c64eb1d8 litesata/example_designs: fix core generation (RAID introduced some changes on the PHY) 2015-06-26 00:20:58 +02:00
enjoy-digital
c615b50735 Merge pull request #14 from olofk/misc_fixes 
Misc fixes
 2015-06-25 23:59:42 +02:00
Olof Kindgren
52e6bf6987 litesata/test: Add missing dependency on scrambler in bist_tb 2015-06-26 01:20:25 +02:00
Olof Kindgren
ffb6081720 litesata/example_designs: Add missing clock in phy instantiation 2015-06-26 01:20:25 +02:00
Florent Kermarrec
125432b5b6 liteeth/example_designs: use new Keep SynthesisDirective 2015-06-23 16:15:28 +02:00
Florent Kermarrec
351e654e9d software/bios/sdram: flush dcache and l2 in memtest (otherwise we are partially testing the cache) 2015-06-23 09:01:34 +02:00
Robert Jordens
2150e6cfef pipistrello: run at 83+1/3 MHz, cleanup CRG 2015-06-22 18:56:57 -06:00
Florent Kermarrec
01c5051866 liteeth/software: fix wishbone bridge 2015-06-23 01:48:45 +02:00
Florent Kermarrec
369cf4c4d7 liteeth/example_designs: add false path between clock domains (speed up implementation) and use automatic PHY detection 2015-06-23 01:08:49 +02:00
Florent Kermarrec
5c939b85ef liteeth/core/arp: fix table timer (wait_timer adaptation issue) 2015-06-23 00:25:26 +02:00
Florent Kermarrec
a3c0e5c4d9 liteeth/core/arp: fix missing MAC address in ARP reply 2015-06-22 23:15:00 +02:00