11 Commits

Author	SHA1	Message	Date
Clifford Wolf	e72abc0284	Added vivado synth_area_{small,regular,large}.tcl scripts	2015-07-01 21:51:15 +02:00
Clifford Wolf	553b1ef143	Updated Xilinx 7-Series area stats	2015-07-01 21:48:51 +02:00
Clifford Wolf	094dc690bb	Added resource utilization to xilinx eval	2015-06-28 13:51:37 +02:00
Clifford Wolf	ef8796de45	Minor vivado script changes	2015-06-27 23:05:00 +02:00
Clifford Wolf	dee66e136e	Added "make table.txt" vivado scripts	2015-06-27 13:55:33 +02:00
Clifford Wolf	60fdba89d0	Updated vivado scripts	2015-06-26 23:41:13 +02:00
Clifford Wolf	1a664f9b97	Changed chip package in vivado examples	2015-06-26 10:46:51 +02:00
Clifford Wolf	8590c7d2a8	Updated Vivado SoC example	2015-06-10 16:48:06 +02:00
Clifford Wolf	26127b45de	Makefile for Vivado scripts	2015-06-09 12:45:45 +02:00
Clifford Wolf	0257d2cb08	Small improvements in vivado_soc demo	2015-06-08 19:58:28 +02:00
Clifford Wolf	072e5ca2c5	Added osu018 yosys synthesis script	2015-06-08 09:31:56 +02:00