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VexRiscv
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185 Commits

Author SHA1 Message Date
Craig Bishop 52a2e889d0 Document using EmbeddedRiscvJtag with BSCANE2 2024-08-26 17:46:06 -07:00
Marc Emery 7beb9887a6 Fix Mhz -> MHz in readme and comments 2024-06-17 21:46:29 +02:00
PythonLinks 30871d3381
Improved the paragraph about available configurations. 2024-03-05 09:57:41 +01:00
Jack Davine 62577a7a11 Add mill to compile and test VexRiscv 2023-12-22 00:36:26 +08:00
Dolu1990 b6118e5cc2
Merge pull request #378 from lschuermann/pmp-napot-rename 
Rename `PmpPlugin -> PmpPluginNapot`, `PmpPluginOld -> PmpPlugin`
 2023-11-14 12:40:29 +01:00
Leon Schuermann cdd8454349 Rename PmpPlugin -> PmpPluginNapot, PmpPluginOld -> PmpPlugin 2023-11-13 13:56:13 -05:00
Emil Tywoniak 00534dc4a8 Add note about Verilator without GDB+OpenOCD 2023-11-03 14:16:05 +01:00
Dolu1990 e6998d1cb3 Add GenFullWithOfficialRiscvDebug 2023-11-03 10:46:49 +01:00
Dolu1990 11cc9b1cf2 Add GenFullWithTcmIntegrated example 2023-11-02 12:32:19 +01:00
Dolu1990 281818af9c #373 Add GenFullWithTcm demo 2023-10-31 11:05:00 +01:00
Dolu1990 acf6ad3bfd Add doc about official RISC-V debug support 2023-09-13 14:56:07 +02:00
Charles Papon fd0f23abb6 Merge branch master into dev 2023-07-11 04:19:06 +08:00
Dolu1990 d078297496 fix too early 2023-02-19 09:48:59 +01:00
Dolu1990 4ae7386904 Merge pull request #276 from LYWalker/master 
Add ability to debug over Intel Virtual JTAG
 2022-11-18 17:38:50 +01:00
Dolu1990 4cd3f65296 Add official RISC-V debug support (WIP, but can already load / step / run code via openocd telnet) 2022-10-19 12:36:45 +02:00
Dolu1990 771eaf431e Better cache invalidation doc 2022-05-24 12:15:57 +02:00
Dolu1990 e6dfcac0be Add D$ single line flush support 2022-05-24 12:13:37 +02:00
Dolu1990 8b2f107d46 verilator++ 2022-02-04 15:10:57 +01:00
Dolu1990 5f2fcc7d0f Merge branch 'dev' 
(SpinalHDL 1.6.0)
 2021-07-20 10:39:09 +02:00
Dolu1990 66bcd7fca7 readme: add the tom link about JTAG and GDB 2021-07-20 10:14:54 +02:00
Dolu1990 a4c86130cc Update README.md 2021-07-09 09:35:49 +02:00
Dolu1990 9bc7dce857
Update README.md 2021-07-08 09:47:54 +02:00
Dolu1990 d67fe72de9 Merge branch 'dev' 
# Conflicts:
#	build.sbt
#	src/test/cpp/regression/main.cpp
 2021-06-15 15:54:13 +02:00
Dolu1990 87f100dac1
Merge pull request #174 from lindemer/new_pmp 
New PMP plugin optimized for FPGAs
 2021-06-03 20:16:34 +02:00
Dolu1990 6cde5f9315 Better doc about iorange 2021-06-02 10:27:46 +02:00
Samuel Lindemer 243d0ec664 Clarify PMP section in README 2021-05-28 13:59:59 +02:00
Samuel Lindemer 15137742fc
Merge branch 'dev' into new_pmp 2021-04-12 13:23:10 +02:00
Samuel Lindemer 9e65b769cf Update README.md 2021-04-12 13:20:15 +02:00
Dolu1990 a8721b02de Add AES/FPU doc 2021-03-29 14:55:41 +02:00
Dolu1990 530554d19c fix fpu diagram 2021-03-16 14:52:57 +01:00
Dolu1990 0d628b4706 fpu add doc 2021-03-16 14:44:31 +01:00
Dolu1990 75bbb28ef6
readme update verlator version 2021-03-06 19:49:23 +01:00
Dolu1990 6aa6191240 Merge branch 'master' into dev 
# Conflicts:
#	build.sbt
#	src/main/scala/vexriscv/Riscv.scala
#	src/main/scala/vexriscv/ip/DataCache.scala
#	src/main/scala/vexriscv/plugin/DBusSimplePlugin.scala
#	src/main/scala/vexriscv/plugin/MmuPlugin.scala
#	src/test/cpp/regression/makefile
#	src/test/scala/vexriscv/TestIndividualFeatures.scala
 2021-01-30 20:30:21 +01:00
Dolu1990 1b65a9e523
remove libts-dev from readme 2020-11-30 16:11:00 +01:00
banahogg d1691e9478
Update GCC prebuild instructions for sifive.com reorg 2020-11-14 17:31:50 -08:00
Dolu1990 b7e7faebad sbt update 2020-10-04 09:57:34 +02:00
Dolu1990 9d35e75fb5
Update README.md 2020-10-01 16:41:24 +02:00
Dolu1990 ebe070f9dd
Update README.md 2020-04-17 19:58:54 +02:00
Dolu1990 5eaa5ba4db Update README.md 2020-04-07 12:29:40 +02:00
Dolu1990 6e239fb280 Update README.md 2020-04-07 12:29:40 +02:00
Dolu1990 31d2aaa05b
Update README.md 2020-03-28 15:38:32 +01:00
Dolu1990 31667b18d8
Update README.md 2020-03-20 11:26:38 +01:00
Dolu1990 ab2f4cd2b7 Merge branch 'master' into dev 
# Conflicts:
#	README.md
#	build.sbt
 2020-03-09 13:41:23 +01:00
Dolu1990 44005ebf31 update Synthesis results 2020-03-07 18:22:01 +01:00
Charles Papon 50ec0a1917 update readme perf 2020-03-05 00:12:46 +01:00
Dolu1990 78d4660282 Merge branch 'dev' into rework_fetch 
# Conflicts:
#	src/test/scala/vexriscv/TestIndividualFeatures.scala
 2020-03-01 22:58:25 +01:00
Dolu1990 02545b9bea typo 2020-03-01 13:03:40 +01:00
Dolu1990 559260020b Improve testing infrastructure with more options and better readme 
https://github.com/litex-hub/linux-on-litex-vexriscv/issues/112
 2020-03-01 13:02:08 +01:00
Dolu1990 0c7556ad7f
Update README.md 2020-02-29 23:46:21 +01:00
Charles Papon 999a868c14 Update readme VexRiscv perf numbers 2020-02-24 00:07:14 +01:00