Dolu1990
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c61f17aea3
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Fetcher/IBusSimplePlugin wip
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2018-10-03 01:02:22 +02:00 |
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Dolu1990
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0ada869b2d
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regression golden ref regfile is now sync with trl boot's random values
wip
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2018-10-01 16:14:21 +02:00 |
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Dolu1990
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65a8d84d30
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Introduce HAS_SIDE_EFFECT Stageable to solve sensitive instruction squeduling
(uncached DBus TODO)
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2018-10-01 12:13:05 +02:00 |
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Dolu1990
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7770eefa3b
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wip
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2018-09-30 12:57:08 +02:00 |
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Dolu1990
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39c6bc11d6
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Pass basic regression again
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2018-09-29 19:04:20 +02:00 |
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Dolu1990
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5ad7c39f47
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wip
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2018-09-29 12:04:58 +02:00 |
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Dolu1990
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37a1970ad6
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wip
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2018-09-28 16:02:33 +02:00 |
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Dolu1990
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32cf90a162
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Merge remote-tracking branch 'origin/dev' into Supervisor
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2018-09-27 22:16:49 +02:00 |
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Dolu1990
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992c21ddd1
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fix travis
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2018-09-27 19:06:33 +02:00 |
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Dolu1990
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9a3510f63d
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Map all supervisor registers
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2018-09-27 19:03:57 +02:00 |
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Dolu1990
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acd1ca422a
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wip
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2018-09-27 18:24:40 +02:00 |
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Dolu1990
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a2d3cfbfc1
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Remove unused file
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2018-09-27 00:56:20 +02:00 |
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Dolu1990
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6dde73f97c
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Murax demo with XIP is now fully defined in SpinalHDL
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2018-09-27 00:55:30 +02:00 |
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Dolu1990
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aff436ddcf
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Sync with SpinalHDL head
Add mmu test into the dhrystone regression command
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2018-09-24 18:31:33 +02:00 |
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Dolu1990
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1e3b75ef1d
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xip typo
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2018-09-23 22:06:21 +02:00 |
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Dolu1990
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86efb75f6a
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rework fetcher
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2018-09-23 22:05:53 +02:00 |
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Dolu1990
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56fd73fbbc
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Add missing bin files
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2018-09-23 19:26:11 +02:00 |
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Dolu1990
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bdc3246f5a
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Fix xip gitignore
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2018-09-23 19:23:43 +02:00 |
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Dolu1990
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5024cc5616
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Hardware breakpoint feature added
Murax XIP debugging passed tests
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2018-09-20 13:11:20 +02:00 |
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Dolu1990
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ff1d1072a7
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XIP is physicaly working on murax
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2018-09-19 00:09:14 +02:00 |
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Dolu1990
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b51ac03a5e
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murax xip flash integration wip
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2018-09-18 16:53:26 +02:00 |
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Dolu1990
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3e17461cc7
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Add optional XIP to Murax
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2018-09-16 11:00:56 +02:00 |
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Dolu1990
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312e8b99b8
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Merge remote-tracking branch 'origin/master' into dev
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2018-09-16 10:21:31 +02:00 |
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Dolu1990
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fc1f4ec23a
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Merge remote-tracking branch 'origin/spinal_1.1.7'
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2018-09-16 10:17:41 +02:00 |
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Dolu1990
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0476de8066
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Move to SpinalHDL 1.2.0
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2018-09-16 10:16:43 +02:00 |
Dolu1990
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44bbfff4d4
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Update README.md
Add more information about the iBus behaviour
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2018-09-14 11:30:26 +02:00 |
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Dolu1990
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d7cba38ec2
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move to SpinalHDL 1.1.7, add more default value for plugins parameters
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2018-09-11 16:08:28 +02:00 |
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Dolu1990
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791608f655
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Move swing stuff into main test package
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2018-08-29 14:55:25 +02:00 |
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Dolu1990
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0255f51cc5
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Add unpipelined Wishbone support for uncached version
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2018-08-24 16:41:34 +02:00 |
Snoopy87
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304c8156a0
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Update version
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2018-08-24 06:51:10 +02:00 |
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Dolu1990
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39e1791067
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Merge remote-tracking branch 'origin/dev'
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2018-08-23 01:23:43 +02:00 |
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Dolu1990
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7ed6835e97
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Add C++ VexRiscv model to cross check the hardware simulation
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2018-08-22 02:08:55 +02:00 |
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Dolu1990
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38af5dbdd5
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riscv emulator WIP (RVC missing)
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2018-08-21 01:03:51 +02:00 |
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Dolu1990
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dca1e5f438
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revert RVC from murax
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2018-08-17 23:12:45 +02:00 |
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Dolu1990
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f8c8643aa5
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Merge remote-tracking branch 'origin/reworkFetcher'
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2018-08-17 21:26:00 +02:00 |
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Dolu1990
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8ebb3af4fc
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Merge remote-tracking branch 'origin/master' into reworkFetcher
Conflicts:
README.md
src/main/scala/vexriscv/TestsWorkspace.scala
src/test/scala/vexriscv/Play.scala
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2018-08-17 20:56:51 +02:00 |
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Dolu1990
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9c7e089329
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Fix ExternalInterruptArrayPlugin CSR ids
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2018-08-17 20:38:33 +02:00 |
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Dolu1990
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819da2d0b4
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remove freertos from travisautomated regressions tests
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2018-08-17 20:07:09 +02:00 |
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Dolu1990
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1d3ac7830b
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restore tests without CSR catch all
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2018-08-17 19:33:41 +02:00 |
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Dolu1990
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330ee14a23
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final fetchRework commit ?
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2018-08-17 19:13:23 +02:00 |
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Dolu1990
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91773ec7d5
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Sync, Seem to pass all except dynamic_o0 which is probably a freertos test setup issue
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2018-08-14 11:51:53 +02:00 |
Tom Verbeure
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ae85698a2b
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MulSimple
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2018-08-09 22:15:26 -07:00 |
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Dolu1990
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7ab04a128d
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Merge pull request #34 from mithro/master
More README fixes
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2018-07-21 18:38:57 +02:00 |
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Dolu1990
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50f6836100
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Merge pull request #29 from mcmasterg/sudo_newline
README.md: add missing newline
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2018-07-21 18:10:21 +02:00 |
Tim 'mithro' Ansell
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373a3fcb90
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README: Small improvement to text.
Fixes #31.
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2018-07-21 09:08:29 -07:00 |
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Tim 'mithro' Ansell
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ccde67bb67
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README: Strip trailing white space.
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2018-07-21 09:03:22 -07:00 |
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Dolu1990
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53cde3731b
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Merge pull request #33 from mithro/master
Improve the Murax example for the iCE40-hx8k_breakout_board
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2018-07-21 12:33:53 +02:00 |
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Dolu1990
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dbda31ad15
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Merge pull request #30 from mithro/mithro-patch-1
Two minor fixes to README.md
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2018-07-21 12:15:29 +02:00 |
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Tim 'mithro' Ansell
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1c5ee779ef
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Generate Murax with the flashy program.
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2018-07-20 19:04:59 -07:00 |
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Tim 'mithro' Ansell
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acbce9fb57
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Adding a README file with images.
Should make it much easier to get started.
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2018-07-20 19:04:41 -07:00 |