Dolu1990
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ccd13b7e9e
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fpu zero/nan wip
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2021-01-21 12:13:25 +01:00 |
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Dolu1990
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50a69d8d4a
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Merge pull request #163 from lindemer/pmp-warl
Make all PMP registers WARL according to specification
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2021-01-21 10:50:49 +01:00 |
Samuel Lindemer
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6c13e6458f
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Remove registers storing PMP region bounds
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2021-01-20 14:27:38 +01:00 |
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Dolu1990
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ac5844f393
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fpu add signed i2f/f2i
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2021-01-20 13:15:29 +01:00 |
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Dolu1990
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15d79ef330
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fpu implement fclass and args for sub, fma, max, fcmp, fsgnj
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2021-01-20 12:01:08 +01:00 |
|
Samuel Lindemer
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828ea96006
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PMP registers are now WARL
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2021-01-20 09:27:35 +01:00 |
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Dolu1990
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11349a71fa
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fpu FpuPlugin now implement all instructions.
Remains the FPuCore to implement cmd.arg and floating point corner cases
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2021-01-19 17:57:41 +01:00 |
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Dolu1990
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9f18045329
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fpu add sstatus.fs
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2021-01-19 16:06:16 +01:00 |
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Dolu1990
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a7d148d0ff
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fpu add vex csr
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2021-01-19 15:53:11 +01:00 |
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Dolu1990
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f826a2ce51
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fpu completion interface added + refractoring
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2021-01-19 15:13:13 +01:00 |
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Dolu1990
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8c4fae8bf2
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fpu add min/sgnj/fmv
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2021-01-19 13:27:42 +01:00 |
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Dolu1990
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ed68c8cf04
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Merge pull request #162 from lindemer/paging
Distinguish between page faults from MMU and access faults from PMP
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2021-01-18 22:18:06 +01:00 |
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Dolu1990
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d7220031d4
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fpu vex i2f works
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2021-01-18 17:18:01 +01:00 |
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Dolu1990
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d4b877d415
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fpu vex cmp/fle works
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2021-01-18 15:09:30 +01:00 |
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Dolu1990
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6cb498cdb2
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fpu merge load/commit
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2021-01-18 13:09:08 +01:00 |
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Dolu1990
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a9d8c0a19f
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fpu wip
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2021-01-18 11:38:26 +01:00 |
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Dolu1990
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3cda7c1f1b
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fpu wip
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2021-01-15 14:03:37 +01:00 |
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Dolu1990
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04499c0b76
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FPU sqrt functional
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2021-01-14 18:33:24 +01:00 |
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Dolu1990
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85dd5dbf8e
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fpu div functional, sqrt wip
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2021-01-14 15:56:56 +01:00 |
|
Samuel Lindemer
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5e6c645461
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Distinguish between page faults from MMU and access faults from PMP
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2021-01-14 09:45:38 +01:00 |
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Dolu1990
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8761d0d9ee
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FpuCore can add/mul/fma/store/load
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2021-01-13 18:28:26 +01:00 |
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Dolu1990
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6e0be6e18c
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Cfu add state index and cfu index
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2021-01-11 13:44:04 +01:00 |
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Dolu1990
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930bdf9dda
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DataCache increase syncPendingMax to 32 and use a sync queue instead of async one
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2021-01-04 10:59:21 +01:00 |
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Dolu1990
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780ad01ac0
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Add AES-instruction support
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2020-12-21 11:52:55 +01:00 |
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Dolu1990
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d2855fcfca
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Merge pull request #147 from lindemer/pmp
Physical Memory Protection (PMP) plugin
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2020-12-11 15:22:28 +01:00 |
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Dolu1990
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c59499ec03
|
typo
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2020-12-11 14:13:33 +01:00 |
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Dolu1990
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eaff52b264
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Add comments to the AesPlugin
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2020-12-11 13:51:10 +01:00 |
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Dolu1990
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6da09967f8
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Add comments to the AesPlugin
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2020-12-11 13:46:55 +01:00 |
|
Samuel Lindemer
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7d699dcc13
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Remove PMP from MachineOs test defaults
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2020-12-10 09:42:27 +01:00 |
|
Samuel Lindemer
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f2ce2eab00
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PMP plugin passes regression tests
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2020-12-07 12:04:45 +01:00 |
|
Samuel Lindemer
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763eebeeba
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Add TOR support, tests pass on GenZephyr
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2020-12-04 17:13:31 +01:00 |
|
Samuel Lindemer
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5cb5061d9b
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PMP passes test with GenZephyr, but pipeline flushes have been disabled
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2020-12-03 17:29:31 +01:00 |
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Dolu1990
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9a6931a54c
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CfuPlugin improve writeback buffering
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2020-12-03 16:21:52 +01:00 |
|
Samuel Lindemer
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987de8fb6a
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Lock PMP address registers in golden model
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2020-12-02 14:18:17 +01:00 |
|
Samuel Lindemer
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14c39a0070
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Merge remote-tracking branch 'upstream/master' into pmp
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2020-12-02 14:08:32 +01:00 |
|
Samuel Lindemer
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872aa19d83
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Add PMP to golden model
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2020-12-02 12:27:26 +01:00 |
|
Samuel Lindemer
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d5b1a8f565
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Add PMP test to regression suite
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2020-12-01 18:38:06 +01:00 |
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Dolu1990
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45ff78d068
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VexRiscvSmpClusterGen.dBusCmdMasterPipe option added
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2020-12-01 13:51:10 +01:00 |
|
Samuel Lindemer
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c5023ad973
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Add PMP regression test
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2020-12-01 09:10:24 +01:00 |
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Dolu1990
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1b65a9e523
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remove libts-dev from readme
|
2020-11-30 16:11:00 +01:00 |
|
Samuel Lindemer
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2d0ebf1ef5
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Flush pipeline after PMP CSR writes
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2020-11-25 15:38:34 +01:00 |
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Dolu1990
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e0ae46e794
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Fix Csr ReadWrite interration with DBusCachedPlugin execute halt
# Conflicts:
# src/main/scala/vexriscv/plugin/CsrPlugin.scala
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2020-11-18 14:43:24 +01:00 |
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Dolu1990
|
832218dbec
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DBusCachedPlugin increase pendingMax to 64 to hide memory latency when saving a full context
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2020-11-16 12:38:29 +01:00 |
|
Dolu1990
|
ba523c627a
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Fix Csr ReadWrite interration with DBusCachedPlugin execute halt
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2020-11-16 12:37:48 +01:00 |
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Dolu1990
|
dae633aa7d
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Merge pull request #150 from banahogg/patch-1
Update GCC prebuild instructions for sifive.com reorg
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2020-11-15 11:25:50 +01:00 |
banahogg
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d1691e9478
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Update GCC prebuild instructions for sifive.com reorg
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2020-11-14 17:31:50 -08:00 |
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Dolu1990
|
c1b0869c21
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AesPlugin is now little endian
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2020-11-12 15:07:27 +01:00 |
|
Dolu1990
|
1b2a2ebaca
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DBusCachedPlugin miss decoded aquire fix
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2020-11-12 15:07:07 +01:00 |
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Dolu1990
|
05e725174c
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AesPlugin added, work with dropbear encryption, seem ok for decryption (barmetal)
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2020-11-02 17:14:52 +01:00 |
|
Dolu1990
|
9abe19317d
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RegFilePlugin.x0Init do less assumption on other plugin behaviour
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2020-11-02 17:01:17 +01:00 |