Commit Graph

1638 Commits

Author SHA1 Message Date
AEW2015 313e758ffe Updated copywrite and renamed to avnet_aesku40 2022-06-03 20:49:52 -06:00
Florent Kermarrec 5188b17a71 sipeed_tang_nano_9k: Switch to old HyperRAM core until issue with new one is investigated. Also do some cleanup and disable video_terminal by default. 2022-06-03 12:28:38 +02:00
Florent Kermarrec ddc6140e25 sipeed_tang_primer_20k: Swithc to GW2APLL. 2022-06-03 12:01:49 +02:00
Florent Kermarrec 6e33d9249f sipeed_tang_primer_20k: Cleanup/Fix. 2022-06-03 11:40:10 +02:00
enjoy-digital 68733c6e92
Merge pull request #396 from Icenowy/tang20k
sipeed_tang_primer_20k: new board
2022-06-03 10:14:55 +02:00
Icenowy Zheng b97d9cd9e8 sipeed_tang_primer_20k: new board
Only initial support is added.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
2022-06-03 00:24:20 +08:00
Andrew E Wilson 4d98dd38a7
Merge branch 'litex-hub:master' into master 2022-06-01 23:01:43 -06:00
Andwer E Wilson 1b96067113 added aesku40 dev board 2022-06-01 22:54:03 -06:00
enjoy-digital 48353735fa
Merge pull request #393 from swetland/ethernet
muselab icesugar pro: add ethernet/etherbone support
2022-05-20 22:10:02 +02:00
enjoy-digital 28c2803ee9
Merge pull request #392 from hansfbaier/enclustra-mercury-fixes
enclustra_mercury_kx2: add clk100, leds, base board serial, DDR3 termination
2022-05-20 22:09:23 +02:00
Brian Swetland 5a714167ed muselab icesugar pro: add ethernet/etherbone support
- use P4 header for a waveshare ethernet phy module
- add --with-ethernet, --with-etherbone, --eth-ip, and --eth-dynamic-ip
  target configuration options
2022-05-19 14:46:09 -07:00
Hans Baier 2214c7baec enclustra_mercury_kx2: remove useless clk100, because it is not connected to a clock pin 2022-05-20 04:42:06 +07:00
Hans Baier f1e021cbbe enclustra_mercury_kx2: add clk100, leds, base board serial, DDR3 termination, DDR3 voltage setting 2022-05-19 15:41:44 +07:00
enjoy-digital 64773b4085
Merge pull request #390 from hansfbaier/hpc-xc7k420t
HPC Store xc7k420t
2022-05-16 11:20:15 +02:00
enjoy-digital df5b38df68
Merge pull request #391 from minexo79/master
Move HDMI Support From Sipeed Tang Nano 4K.
2022-05-16 11:18:37 +02:00
Hans Baier f14865fa42 Merge branch 'hpc-xc7k420t' of github.com:hansfbaier/litex-boards into hpc-xc7k420t 2022-05-16 12:34:30 +07:00
Hans Baier c5d292c7f9 Get 4 DDR modules working with Vivado 2022-05-16 12:33:04 +07:00
minexo79 efa5740811 Move HDMI Support From Sipeed Tang Nano 4K. 2022-05-15 10:53:09 +08:00
Hans Baier 26c0f546c7
Merge branch 'litex-hub:master' into hpc-xc7k420t 2022-05-14 21:40:12 +07:00
Hans Baier 006b54e7ea Get 3 DDR modules working with Vivado 2022-05-14 21:38:25 +07:00
Florent Kermarrec 1e77c28ed0 muselab_icesugar_pro/VideoHDMIPHY: Remove obsolete drive_both. 2022-05-12 16:09:40 +02:00
enjoy-digital ee58e5dbc7
Merge pull request #388 from swetland/hdmi
muselab: icesugarpro: fix HDMI output
2022-05-12 15:09:03 +02:00
Florent Kermarrec dabf2cff06 sqrl_acorn: Switch back to PCIe Gen2 X4 and enable 64-bit addressing (Not really useful except for 64-bit addressing tests). 2022-05-12 13:32:41 +02:00
Hans Baier f383ad3938 Support HPC Store XC7K420T board 2022-05-12 12:55:46 +07:00
Hans Baier d1096a2cd0 Add HPC Store XC7K420T board 2022-05-11 08:58:50 +07:00
Florent Kermarrec 45494f60e0 targets: Change SoC/Software headers generation behaviour (Now only generated with --build).
Re-generating the SoC/Software headers was causing some un-expected behaviours for users not familiar
with the flow. For example doing a --load with a different configuration, was re-generating the Software
headers and messing up things when trying to run software on the SoC.
2022-05-06 15:14:32 +02:00
Florent Kermarrec 0ce7f8354c Add initial LimeSDR Mini V2 support (With SoC + USB3 (FT245PHYSynchronous)).
python3 -m litex_boards.targets.limesdr_mini_v2 --csr-csv=csr.csv --build --load
litex_server --jtag --jtag-config=openocd_limesdr_mini_v2.cfg
litex_term crossover

        __   _ __      _  __
       / /  (_) /____ | |/_/
      / /__/ / __/ -_)>  <
     /____/_/\__/\__/_/|_|
   Build your hardware, easily!

 (c) Copyright 2012-2022 Enjoy-Digital
 (c) Copyright 2007-2015 M-Labs

 BIOS built on May  3 2022 18:59:46
 BIOS CRC passed (5f29afcc)

 LiteX git sha1: a4cc859d

--=============== SoC ==================--
CPU:		VexRiscv @ 80MHz
BUS:		WISHBONE 32-bit @ 4GiB
CSR:		32-bit data
ROM:		128KiB
SRAM:		8KiB


--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
sL5DdSMmkekro
Timeout
No boot medium found

--============= Console ================--

litex> ident
Ident: LiteX SoC on LimeSDR-Mini-V2 2022-05-03 18:59:29
2022-05-03 19:04:06 +02:00
Florent Kermarrec c93b4dc4dc targets: Fix targets that not using full imports. 2022-05-03 18:41:18 +02:00
Florent Kermarrec 683226df34 litex_boards: Remove short imports since not really longer useful and mess up Python imports.
We could maybe find a better implementation to avoid messing up imports but not sure it's really useful.
This also enforces consistency in platforms/targets.
2022-05-03 17:53:57 +02:00
Brian Swetland ec220e4b5b muselab: icesugarpro: fix HDMI output
- enable data_n outputs
- use drive_both property of updated VideoHDMIPHY to drive both
  differential outputs
- adjust default clocking to successfully close timing
  (sysclk at 50Mhz, HDMI at 25MHz, HDMIx5 at 125MHz)
2022-05-03 04:04:26 -07:00
Florent Kermarrec 28da4f83eb targets: Use new HyperRAM's sys_clk_freq parameter. 2022-05-02 16:43:52 +02:00
Florent Kermarrec 1e7c005480 CONTRIBUTORS: Update. 2022-05-02 13:54:53 +02:00
Florent Kermarrec 3ebc9877ad 1bitsquared_icebreaker: Rename to icebreaker (Python does not like number as prefix for imports). 2022-05-02 13:20:40 +02:00
Florent Kermarrec 877bc4b45e targets: Use full imports (vendor_board). 2022-05-02 12:55:11 +02:00
Florent Kermarrec 9914478854 xilinx_ac701: Add SPI-Flash support. 2022-04-28 11:05:51 +02:00
Florent Kermarrec ae8bdb74a9 xilinx_kc705: Add SPI-Flash support. 2022-04-28 10:27:54 +02:00
Florent Kermarrec b778ba5f70 sqrl_acorn: Add XADC/DNA (For LitePCIe driver test). 2022-04-27 15:01:09 +02:00
Florent Kermarrec 74db821f67 colorlight_5a_75x: Switch ethernet/etherbone to 32-bit. 2022-04-25 18:50:21 +02:00
Florent Kermarrec 68ea5fe057 platforms/colorlight_5a_75b/v7_0: Comment rst_n to avoid deadlock on reboot command. 2022-04-25 18:50:17 +02:00
Tim 'mithro' Ansell 8830d15d83
Merge pull request #385 from jorge-rs/patch-1
Delete additional "o" in "builder" object
2022-04-24 14:56:25 -07:00
Jorge Castro-Godínez adb0922e8f
Delete additional "o" in "builder" object
Delete an additional "o" in "builder" object. It makes not possible to program the Basys 3 out-of-the-box.
2022-04-23 18:06:19 -06:00
Florent Kermarrec 575d681891 targets: Use "" for strings. 2022-04-21 15:48:29 +02:00
Florent Kermarrec 353aba0359 targets: Move USB-ACM/ValentyUSB clone directly to LiteX to avoid duplication in targets. 2022-04-21 15:43:50 +02:00
Florent Kermarrec 4fbf2fc7de targets: Replace self.add_wb_master with self.bus.add_master. 2022-04-21 15:32:19 +02:00
Florent Kermarrec 39a314cdae Rename aliexpress_u420t to aliexpress_xc7k420t. 2022-04-21 14:28:26 +02:00
Florent Kermarrec d6696f666b test/test_targets: Use new --no-compile instead of --no-compile-software/--no-compile-gateware. 2022-04-21 12:31:31 +02:00
Florent Kermarrec 88f2625c3d targets: Fix typos. 2022-04-21 12:29:54 +02:00
Florent Kermarrec a611f035d6 targets: Move CRG before SoCCore init (More logical and simplify some specific reset schemes) and switch SoCCore to one line when possible.
Moving CRG simplify reset with NaxRiscv debug module and is in fact more logical.
Also do some minor updates/cosmetic changes while touching CRG/SoCCore.
2022-04-21 12:19:45 +02:00
Florent Kermarrec 14f4500653 README: Update boards list. 2022-04-21 10:39:54 +02:00
enjoy-digital 06396a2cb6
Merge pull request #384 from hansfbaier/qmtech-ep4cgx150
add board support for QMTech EP4CGX150
2022-04-21 10:36:51 +02:00