fbd424fc48
DECA: Add Ethernet and Etherbone support
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Also fixed pcf_en IO standard compared to golden Arrow project.
2022-01-29 15:15:53 -08:00
9e5224ca49
Add JTAGbone support to Terasic DECA
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Along the way I added UARTbone support to DECA as well for debugging.
Examples:
./terasic_deca.py --csr-csv csr.csv --with-jtagbone --build --load
litex_server --jtag --jtag-config ../prog/openocd_max10_blaster2.cfg
litex_term crossover
./terasic_deca.py --csr-csv csr.csv --uart-name jtag_uart --build --load
litex_term --jtag-config ../prog/openocd_max10_blaster2.cfg jtag
2022-01-27 14:13:58 -08:00
dd134a4b7d
digilent arty z7: allows toolchain selection (PL only)
2022-01-26 07:30:06 +01:00
74395ca80b
digilent_nexyx_video: Add default toolchain value to CRG (to avoid breaking existing designs).
2022-01-25 16:13:57 +01:00
624572f2e9
alinx_axu2gca: Review and do minor cosmetic changes.
2022-01-25 14:58:47 +01:00
537f04a13d
alinx_axu2gca: new board
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Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
2022-01-25 07:35:42 +01:00
621d45cd9e
digilent_arty: Review and improve CRG to avoid specific yosys+nextpnr code.
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sys4x/sys4x_dqs/idelay clks can be disabled when integrated-main-ram is used.
2022-01-24 19:16:07 +01:00
c2276c1e6d
Merge pull request #338 from suarezvictor/master
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Add tweaks to Arty board to support yosys+nextpnr toolchain
2022-01-24 19:02:59 +01:00
1abb03e514
tang_nano_4k: Review/Cleanup:
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- Revert abstractions on clk_name/period: Too much abstraction to avoid duplications makes the code more difficult to read.
ex:
- When constraining clk27, frequency is already in the name.
- In the target, we want to know we are using clk27 as the main clk.
- We need a default sys_clk_freq for project only importing BaseSoC.
- Revert SPI Flash import (for consistency with other targets).
- Keep VexRiscv as default CPU since this target is able to run it and also for consistency with other targets.
2022-01-24 18:46:51 +01:00
e357eb6d8f
Merge pull request #337 from sergachev/tang_nano_4k_emcu
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Enable LiteX BIOS on ARM core on Tang nano 4K
2022-01-24 18:36:10 +01:00
cc1b46f106
tang_nano_9k: Fix HyperRAM integration.
2022-01-24 18:35:12 +01:00
db77ea5c7a
Add tweaks to Arty board to support yosys+nextpnr toolchain
2022-01-24 02:06:34 -03:00
6238052b10
tang nano 4k: disable spi flash with gowin emcu, cleanup
2022-01-23 16:10:46 +01:00
6c81fc708c
tang nano 4k: add memory regions, set default cpu
2022-01-23 13:05:51 +01:00
787f44e7d9
Merge pull request #336 from tcal-x/cmod-a7-flash
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Digilent CMOD A7: add flash support.
2022-01-23 08:36:49 +01:00
6567af6f49
Digilent CMOD A7: add flash support.
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Add both "--flash" and "--with-spi-flash"; tested on board.
4MB flash mapped at 0x00400000.
Signed-off-by: Tim Callahan <tcal@google.com>
2022-01-22 18:50:12 -08:00
f533e7f8ba
sipeed_tang_nano_9k: enable copackaged PSRAM
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Also enable SPI SDCard which was pending by the lack of main_ram
previously.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
2022-01-23 03:37:03 +08:00
999dbd572f
Merge pull request #334 from Icenowy/tang9k
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sipeed_tang_nano_9k: new board
2022-01-22 15:49:08 +01:00
e699c377a5
sipeed_tang_nano_9k: new board
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Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
2022-01-22 11:45:49 +08:00
e9d4d9066a
xilinx_zcu106: add DDR4 interface and fix reset error
2022-01-22 03:08:21 +08:00
b8aad4b030
Merge pull request #332 from tcal-x/prog-cmod-a7
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Add openocd programmer for Digilent CMOD A7.
2022-01-21 08:05:22 +01:00
e0c4c0fe39
Add openocd programmer for Digilent CMOD A7.
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Signed-off-by: Tim Callahan <tcal@google.com>
2022-01-20 20:54:03 -08:00
0e91013fc7
quickfeather: fix path to libeos library when board script called not from its directory; fix wget redownloads; add libeos to gitignore
2022-01-20 18:43:59 +01:00
5f2ccb2d32
targets: Switch from bridge to crossover.
2022-01-19 17:03:17 +01:00
abb54cebb3
trenz_c10lprefkit: Add Etherbone support.
2022-01-19 14:47:14 +01:00
1ce978806d
Merge pull request #328 from sergachev/fix/zedboard_software
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Fix Zedboard software
2022-01-19 10:05:49 +01:00
f11106e9c5
targets/digilent_cmod_a7: Simplify/Cleanup.
2022-01-19 10:03:20 +01:00
f8e3cc5361
Merge pull request #327 from bl0x/digilent_cmod_a7
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digilent_cmod_a7: Remove unused clocks.
2022-01-19 09:59:44 +01:00
bbf13f4439
zedboard: remove a hack
2022-01-19 02:41:11 +01:00
4f4d47dcdd
zedboard: correct memory map
2022-01-19 02:40:54 +01:00
fccb952c4b
target: Remove ident_version=True no longer required.
2022-01-18 17:13:02 +01:00
7114911cea
targets: --no-ident-version is now directly provided by LiteX, remove it on targets implementing it.
2022-01-18 16:47:38 +01:00
d92a2b82fb
targets/l2_cache_reverse: Now defaulting to False in LiteX, so setting it to False for correct Framebuffer operations is no longer required.
2022-01-18 11:37:55 +01:00
2c26f07a5a
digilent_cmod_a7: Remove unused clocks.
2022-01-17 22:49:10 +01:00
12fa844b56
decklink_mini_4k: Add dedicated SATA PLL to allow SATA + Framebuffer.
2022-01-17 18:11:52 +01:00
f97e48e4f3
decklink_mini_4k: Add SATA support (over PCIe2SATA).
2022-01-17 14:19:59 +01:00
3e187dea42
quicklogic_quickfeather: Make imports similar to other boards.
2022-01-17 10:00:58 +01:00
99752738b0
Merge pull request #326 from litex-hub/pr322
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quicklogic_quickfeather: add eos_s3 arm software support library
2022-01-17 09:56:41 +01:00
9984bb8ffb
quicklogic_quickfeather: add eos_s3 arm software support library
2022-01-17 09:47:38 +01:00
06fb73ace3
targets/digilent_nexys_video: Remove SATA Gen3 support (max linerate=3.75Gbps with -1 speedgrade).
2022-01-17 08:45:24 +01:00
ed04e5f95c
Merge pull request #325 from gsomlo/gls-sata-gen
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targets/digilent_nexys_video: add SATA generation argument
2022-01-17 08:41:29 +01:00
6103b3b234
targets/colorlight_5a_75x: List 8.0 in supported revision.
2022-01-17 08:27:19 +01:00
5c2d85e6a3
targets/digilent_nexys_video: add SATA generation argument
2022-01-16 19:59:36 -05:00
1077e23e62
digilent_cmod_a7: Also propagate here.
2022-01-16 11:58:14 +01:00
296c99f065
digilent_pynq_z1: Do minor cosmetic cleanups.
2022-01-14 09:39:42 +01:00
45cfe2be6b
qmtech_ecp4ce15/ecp4ce55: Merge in qmtech_ecp4cex5.
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Defaults to ecp4ce15, ecp4ce55 can be selected with --variant=ecp4ce55.
2022-01-14 09:33:29 +01:00
830757502f
Merge pull request #321 from r4d10n/master
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Support for Digilent Pynq Z1
2022-01-14 08:48:26 +01:00
a3d168e4c0
HDMI Terminal Support
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Copyright notice update.
2022-01-13 23:28:43 +05:30
e27d49114f
Add initial and minimal ZCU106 support (with Clk/Leds/UART).
2022-01-13 17:40:03 +01:00
ed50c84e0d
Support for Digilent Pynq Z1
2022-01-11 19:33:12 +05:30
c57ea732dd
Added QMTech EP4CE55 board - almost identical to EP4CE15 board but bigger FPGA.
2022-01-07 19:27:40 +00:00
8a33c2aa31
targets: Ensure litex.soc.cores.spi_flash is no longer imported/used.
2022-01-07 19:07:14 +01:00
4b6a9b2cf0
targets/spiflash: Simplify self.cpu.set_reset_address call.
2022-01-07 15:19:23 +01:00
30cacc19c2
efinix_xyloni_dev_kit: Update SPI Flash.
2022-01-07 15:00:39 +01:00
16171282c8
digilent_arty/CRG: Add with_rst parameter to be able to easily disable rst.
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On Arty, cpu_rst pin is connected to a button but also to USB-UART which also
resets the SoC when USB-UART is connected which is in some case not wanted.
with_rst provides an easy way to disable rst by setting it to False.
2022-01-07 14:12:28 +01:00
3ebbebe750
Merge pull request #319 from antmicro/datacenter-updates
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antmicro-datacenter updates
2022-01-07 11:03:30 +01:00
8151bf7ffa
targets: Update and simplify SPI-Flash support (Address is now automatically allocated).
2022-01-07 10:34:47 +01:00
a4130556ac
gsd_butterstick: Add optional SYZYGY GPIO (--with-syzygy-gpio) to expose the 32 GPIOs on SYZYGY breakout board.
2022-01-06 18:37:42 +01:00
4ae7b5e4ff
antmicro_datacenter: extend eth reset
2022-01-06 17:40:44 +01:00
144c0dc27e
digilent_zedboard: +x.
2022-01-06 09:38:19 +01:00
28cdc8b914
spartan_edge_accelerator: Review/Simplify.
2022-01-06 09:37:46 +01:00
2c6ce12154
spartan_edge_accelerator: Add seeedstudio prefix and seeedsstudio to vendors list.
2022-01-06 09:06:27 +01:00
1ee619a455
Merge pull request #317 from primeshp/spartanacc
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Spartan Edge Accelerator Board support
2022-01-06 09:03:02 +01:00
db9173ad8b
targets/alchitry_mojo: Fix build.
2022-01-05 18:11:53 +01:00
53dc00eab7
targets/parser: Rely on argparse.ArgumentDefaultsHelpFormatter to provide default in help description.
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Also do minor adjustments while doing this.
2022-01-05 17:06:40 +01:00
c836b57145
titanium_ti60_f225_dev_kit: Add HyperRAM separator.
2022-01-04 15:18:26 +01:00
28a6fad705
targets/efinix_titanium_ti60_f225: Defaults to 200MHz clock and increase HyperRam size to 32MB.
2022-01-04 11:25:18 +01:00
f5ac5200ff
Added Spartan Edge Accelerator board
2022-01-03 17:14:54 -05:00
713ae531f6
Add Spartan Edge Accelerator support
2022-01-03 16:31:13 -05:00
059563245d
Merge pull request #314 from sergachev/zedboard
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LiteX BIOS on Zedboard
2022-01-03 17:59:22 +01:00
c9816f2bc1
snicker_doodle: Add z7-10/z7-20 variants support.
2022-01-03 17:15:27 +01:00
dc61d383e6
snickerdoodle: Rename to krtkl_snicker_doodle and do minor cosmetic changes.
2022-01-03 17:09:17 +01:00
a118a0e499
Replaced Blinky with LedChaser.
2021-12-24 22:14:18 -05:00
bc3c42ab5f
zedboard: disable soc uart for all variants (zynq does not need it, for soft cpus there are no pins)
2021-12-22 03:28:13 +01:00
53ce00b3fd
zedboard: add target with bios on arm zynq cpu
2021-12-22 03:14:13 +01:00
154cb672da
Removed unused ext_freq parameter.
2021-12-20 21:42:21 -05:00
81404ff185
Improved PS7 support. Configured external clock.
2021-12-20 21:14:18 -05:00
d64207f8b6
Merge branch 'litex-hub:master' into master
2021-12-20 17:35:35 -05:00
94b4789286
Merge pull request #312 from trabucayre/arty_z7
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adding digilent_arty_z7 support
2021-12-20 21:50:41 +01:00
8772190177
Merge pull request #311 from tilk/icesugar_pro
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Option --with-spi-flash for iCESugar-Pro
2021-12-20 21:49:26 +01:00
8664b59f23
targets: Fix --bios-flash-offset support and other minor cleanups.
2021-12-20 21:41:12 +01:00
c6303480cb
Merge pull request #308 from hubmartin/tinyfpga_bx
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Fix bios-flash-offset for tinyFPGA
2021-12-20 21:29:37 +01:00
bb92bb00a8
adding digilent_arty_z7 support
2021-12-20 18:02:57 +01:00
4c76e12932
Merge branch 'litex-hub:master' into master
2021-12-20 10:54:09 -05:00
7fb225a162
Option --with-spi-flash for iCESugar-Pro
2021-12-19 15:50:52 +01:00
f18c1a033c
Efinix: ti60: add HyperRAM support
2021-12-17 10:23:10 +01:00
1c87c391c4
Initial release for Snickerdoodle
2021-12-14 16:00:42 -05:00
84f267e00c
Change bios-flash-offset for tinyFPGA
2021-12-14 19:10:03 +01:00
c2a840f777
Merge pull request #307 from fjullien/titanium_spi
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Titanium spi
2021-12-14 08:21:15 +01:00
9608cae2ee
efinix: Ti60f225 change spi_flash module
2021-12-13 23:01:48 +01:00
be7dbf3b1b
exfinix: efinix_titanium_ti60_f225_dev_kit: fix typo
2021-12-13 22:53:50 +01:00
179e9090d1
Rename efinix_titanium_ti60_bga225_dev_kit to efinix_titanium_ti60_f225_dev_kit and also exclude it from tested platforms/targets.
2021-12-13 15:54:56 +01:00
e84f32b918
efinix: add titanium Ti60 dev kit
2021-12-13 09:37:14 +01:00
35e0026875
Merge pull request #303 from sergachev/master
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sipeed_tang_nano_4k: add option to build with Gowin EMCU
2021-12-09 14:30:54 +01:00
14a8c50e97
sipeed_tang_nano_4k: connect Gowin EMCU UART, undo unnecessary changes
2021-12-09 00:17:48 +01:00
6274c4c425
sipeed_tang_nano_4k: connect Gowin EMCU UART
2021-12-09 00:12:31 +01:00
13c83ba532
sipeed_tang_nano_4k: add initial Gowin EMCU support
2021-12-08 23:50:14 +01:00
4287ab561e
sipeed_tang_nano_4k: allow non-vexriscv CPUs
2021-12-08 23:33:49 +01:00
9119250276
Merge pull request #300 from tilk/de1_soc
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Better support for DE1-SoC
2021-12-08 06:18:25 +01:00
2b7587632f
Merge pull request #299 from gregdavill/butterstick-updates
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Butterstick updates
2021-12-08 06:16:29 +01:00
Jevin Sweval
Gwenhael Goavec-Merou
Florent Kermarrec
Victor Suarez Rovere
Ilia Sergachev
Tim Callahan
Icenowy Zheng
vacajk
Bastian Löher
Gabriel Somlo
Rakesh Peter
Alastair M. Robinson
Karol Gugala
Primesh
Derek Mulcahy
derekmulcahy
Marek Materzok
Franck Jullien
hubmartin
Ilia Sergachev