Florent Kermarrec
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b6ebcece95
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add read grouping to etherbone, we now have interesting upload speeds... :)
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2015-02-23 18:58:31 +01:00 |
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Florent Kermarrec
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ac5b7c073a
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test: add make.py to replace static config.py file
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2015-02-23 18:55:19 +01:00 |
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Florent Kermarrec
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71f3a5bf13
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prepare reads grouping to speed up upload
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2015-02-23 18:11:08 +01:00 |
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Florent Kermarrec
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e309ba55ea
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use new Migen sel signal to change the way we upload data (will enable fifo bursts)
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2015-02-23 12:34:04 +01:00 |
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Florent Kermarrec
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d3486dba91
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rle: increase dw automatically when needed
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2015-02-23 09:41:18 +01:00 |
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Florent Kermarrec
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2a2c3af380
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host/dump: optimize get_bits / decode_rle since we can now have large dumps
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2015-02-23 02:14:20 +01:00 |
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Florent Kermarrec
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861c54760e
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host/driver/reg: use burst mode to speed up upload of data (useful with Etherbone)
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2015-02-23 00:49:59 +01:00 |
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Florent Kermarrec
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282c9b9426
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test: add make.py to replace static config.py file
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2015-02-23 00:21:12 +01:00 |
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Florent Kermarrec
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b1dee774cd
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tty working
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2015-02-22 15:23:55 +01:00 |
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Florent Kermarrec
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2fa28c1b5d
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mac: add padding
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2015-02-22 13:56:06 +01:00 |
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Florent Kermarrec
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a802a5c535
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remove MiSoC dependency
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2015-02-21 23:50:25 +01:00 |
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Florent Kermarrec
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a2370388fb
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doc: remove IP
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2015-02-21 23:34:30 +01:00 |
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Florent Kermarrec
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15240912c9
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doc: remove IP
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2015-02-21 23:34:08 +01:00 |
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Florent Kermarrec
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ea7962da12
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doc: remove IP
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2015-02-21 23:33:49 +01:00 |
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Florent Kermarrec
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acdf511bd1
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doc: remove IP
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2015-02-21 23:33:21 +01:00 |
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Florent Kermarrec
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7837580020
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add ft2232h software code (will need rework)
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2015-02-21 23:19:10 +01:00 |
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Florent Kermarrec
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b59c777cab
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add ft2232h hdl code (will need rework)
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2015-02-21 23:13:43 +01:00 |
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Florent Kermarrec
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1b0bc5ca44
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init repo structure
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2015-02-21 23:06:36 +01:00 |
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Florent Kermarrec
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4bdb1ffda2
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add README skeleton
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2015-02-21 22:58:42 +01:00 |
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Florent Kermarrec
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65294a5577
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add tty over udp (will need mac to insert padding)
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2015-02-21 21:26:52 +01:00 |
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Florent Kermarrec
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0a9043b6c1
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remove MiSoC dependency
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2015-02-21 19:34:14 +01:00 |
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Florent Kermarrec
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52f5955dca
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remove MiSoC dependency
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2015-02-21 19:29:26 +01:00 |
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Florent Kermarrec
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741ecca5b4
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la: fix intput_buffer clocking when clk_domain is not "sys"
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2015-02-19 11:41:54 +01:00 |
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Florent Kermarrec
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37e463da9a
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fix rle when used with subsampler
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2015-02-19 11:34:20 +01:00 |
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Florent Kermarrec
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e495e2f537
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driver/la: add samplerate computation (required by sigrok export)
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2015-02-19 11:16:32 +01:00 |
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Florent Kermarrec
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8e0553670a
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remove limitation on debug tuple definition
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2015-02-19 10:52:57 +01:00 |
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Florent Kermarrec
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5f19955825
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rle: expose length parameter to user, add assertion on dw to encode counter and automatically increase dw in rle mode
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2015-02-19 10:42:13 +01:00 |
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Florent Kermarrec
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5fb6beb473
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enable RLE only in POST_HIT_RECORDING state (to ensure programmed offset is respected)
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2015-02-19 10:26:34 +01:00 |
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Florent Kermarrec
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788652c6f8
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simplify RLE
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2015-02-19 01:43:04 +01:00 |
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Florent Kermarrec
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87f29a307a
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fix typo
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2015-02-18 23:35:50 +01:00 |
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Florent Kermarrec
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3680b48216
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dump/sigrok: fix against real dumps, now able to import and export
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2015-02-18 21:45:36 +01:00 |
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Florent Kermarrec
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6db831e5a8
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update LiteX
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2015-02-18 11:39:22 -07:00 |
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Florent Kermarrec
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73ab271f9a
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targets/kc705: fix csr address conflict on eth
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2015-02-18 10:45:18 -07:00 |
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Florent Kermarrec
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0a38b8c74a
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add LiteX external core and remove ethmac
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2015-02-18 10:43:44 -07:00 |
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Florent Kermarrec
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9ebb8f8022
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remove verilog and move mxcrg.v to misoclib/mxcrg
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2015-02-18 10:40:30 -07:00 |
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Florent Kermarrec
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5500c41915
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move lm32/mor1kx submodules to extcores
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2015-02-18 10:39:18 -07:00 |
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Florent Kermarrec
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4c9554b65c
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gensoc: call do_exit after SoC is built
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2015-02-18 10:38:14 -07:00 |
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Florent Kermarrec
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9326985e05
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update LiteScope
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2015-02-18 16:53:02 +01:00 |
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Florent Kermarrec
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e6f1bdb152
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update LiteScope
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2015-02-18 16:51:35 +01:00 |
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Florent Kermarrec
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6bfd5ce1d8
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split host files since we now have more drivers/dumps supported
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2015-02-18 16:49:38 +01:00 |
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Florent Kermarrec
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08935dce9a
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make.py: add powered by Migen
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2015-02-18 16:39:18 +01:00 |
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Florent Kermarrec
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e17791a85b
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readme/make.py: add powered by Migen
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2015-02-18 16:38:48 +01:00 |
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Florent Kermarrec
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2f6465d439
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add sigrok import (to check export against it)
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2015-02-18 15:23:04 +01:00 |
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Florent Kermarrec
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130212039e
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continue sigrok export (should almost work)
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2015-02-18 11:59:35 +01:00 |
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Florent Kermarrec
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cd43163d9d
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add sigrok export skeleton (wip)
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2015-02-18 00:44:33 +01:00 |
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Florent Kermarrec
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70f94ea0eb
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logo : add powered by Migen
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2015-02-17 23:17:46 +01:00 |
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Florent Kermarrec
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89eaef0e43
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logo : add powered by Migen
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2015-02-17 23:16:06 +01:00 |
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Florent Kermarrec
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5830575797
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logo : add powered by Migen
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2015-02-17 23:14:21 +01:00 |
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Florent Kermarrec
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79a7f9ecb8
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create BaseSoC as a basic example design and build UDPSoC/EtherboneSoC on top of it
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2015-02-17 12:37:17 +01:00 |
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Florent Kermarrec
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eeaf03669a
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test: we can now test regs with Etherbone
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2015-02-17 01:15:06 +01:00 |